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SHfH5E XKu 5 HCt<+t<|u| HCu[ SHH HL$8LD$@LL$Ht7)D$P)L$`)T$p)$ )$ )$ )$ )$ dH%( HD$1H H9w HL$dH3 %( HuiH [ H)IIHH$ H$ HD$HD$ D$0 HD$-Ix HHfHxIHJff. AVAUATUHSH HtuH{ IIL-Z tyf LLH1HHHb H[H{ uLHH`Z 1HH[H]A\A]A^- D [HH]A\A]A^ D LHHZ 1LI>[HH]A\A]A^ f D AVAUL-Y ATLbUHS-H_H{ tl @ DC LLH1H{HHH[H{ uDC LHHY 1H{H[H]A\A]A^ H) IH9tH{L[H]A\A]A^zO DCLHH1Y 1_I^If D AVAUATIHH$Y UHSH H LoLdH%( H$ 1AM EE If D H9k0tJHHut upLLuH$ dH3%( H []A\A]A^f D K(DC,D9ttHX LL1HLHJ EMEEH1H= HLHGX LH14IL @ HX LL1HGf. AWAVAUATUSH { IHH- H L5W Hm H L} HEgUfAfAuу<wǿ8 U
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IFHuS H@HtG;u;huHP L"IT$HP ID$ ID$M$$MuH[]A\A]A^A_ IFHu% D H@Ht;X u;h(r;h,wIr( IVHPHPhH@ HP LpIFb @ H`( HUHPHPHhD`H@ HP HEHm Hff. ATUHSH . H dH%( H$ 1IHu HHtXHC0HtHpHEtHC0HOT LLH@HD@
1*H{0LHHHu H$ dH3%( u H []A\ÐHLHkCf. ATHcAH9 HUHSHX@HtKC HH@Hx tC
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Z8Ct H= S @C 8C wH[]A\A] @ H=)S ?C C H[]A\A]f. AWAVAUAATUSH(HІ H$HcH@H L$HHD$i HD$1HHD$9t 8 yA E1 AE9~Ӌ xD9uH=Q ED1>1HHAfw]E D$ucHD$H CMIHt4L_ LN<w
H|$LL?H/>Rf. ED H5Q 1>HD$H LIHuH=HR Q> H@ DH0 H([]A\A]A^A_ÉH5Q 14>}ff. @ AWAVAUATUSHH P" 1 HxH HH Hǀ H) 1H= @ ߃ uH=bQ R=H S E1H AHA t 9 ty u 1D 1E1L-lQ HEf; @ H[Hu7u D <uH5iQ 1HHt@K
S L DK DC 1<C
<uH5Q 1 D H=rN H = H;H HPHHJ9 []A\ H=N HAA EE H=M >9 @ AD:H 8 tH9 @ F$ []A\f H=v( H UfHHH5gM ~8 []A\f D 1$H=gM 1L%|M 8$f HM HUL LE18HH*8HHu1k8 H8xP H=1 H u f D 1HH=M 1\HH=2M 1KHH=M 1:HH=PM +f. AWIAVIAUAATL%n UH-n SL)H2Ht 1 LLDAHH9uH[]A\A]A^A_ff. HH " /%02x:%02x.%d /%02x.%d %04x: [size=%u%s] %s: %016lx-%016lx %08x-%08x [disabled] non- 64-bit 32-bit type 3 low-1M Region %d: I/O ports at %04lx [virtual] %08lx (%s, %sprefetchable) [enhanced] Expansion ROM at [disabled by cmd] Slot: Device: Class: %s
SVendor: %s
SDevice: %s
PhySlot: %s
Rev: %02x
ProgIf: %02x
NUMANode: %d
DTNode: %s
IOMMUGroup: %s
-r%02x -p%02x "" "" %s: %s (rev %02x) (prog-if %02x [%s] DeviceName: %s Subsystem: %s
slow medium fast ?? (prefetchable) Physical Slot: %s
Device tree node: %s
Latency: %d ( %dns min %dns max , Cache Line Size: %d bytes NUMA node: %d
IOMMU group: %s
Flags: bus master, VGA palette snoop, stepping, fast Back2Back, 66MHz, user-definable features, %s devsel , latency %d , IRQ %d , NUMA node %d , IOMMU group %s BIST is running BIST result: %02x
I/O behind bridge Memory behind bridge I/O window %d: %08x-%08x%s
Secondary status: SERR --version lspci version 3.7.0 -s: %s -d: %s Internal bug: Accessing non-read configuration byte at position %x lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d
!!! Invalid class %04x for header type %02x
!!! Unknown header type %02x
Control: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c
Status: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c SERR%c TAbort%c Reset%c FastB2B%c
PriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c
Memory window %d: %08x-%08x%s%s
BridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c
16-bit legacy interface ports at %04x
Bus mapping mode does not recognize bus topology p333333333`333@3(3333333333333333333233332323223x2h2382 2323 2 K M G T lspci \\ \x%02x Read-only Read/write bad good large small Vital Product Data End Product Name: %s fields:
[ ] %s: %d byte(s) free
Not readable No end tag found Extended capability Engineering changes Manufacture ID Part number Reserved Read-write area Serial number Asset tag Vendor specific System specific CCIN Feature code FRU Network address Firmware version Product specific Unknown checksum %s, %d byte(s) reserved
Unknown %s resource type %02x, will not decode more.
memory space, non-prefetchable VF memory space, non-prefetchable allocation behind bridge, non-prefetchable memory allocation behind bridge, prefetchable memory allocation behind bridge, I/O space memory space resource unavailable for use I/O space resource unavailable for use entry unavailable for use, PrimaryProperties should be used 800-1200mV(full-swing)/400-700mV(half-swing) 200-400mV(full-swing)/100-200mV(half-swing) Link Up - Present and DRS Received PCI-Express to PCI/PCI-X Bridge PCI/PCI-X to PCI-Express Bridge (Slot%c) Root Complex Integrated Endpoint DevCap: MaxPayload %d bytes, PhantFunc %d DevCtl: CorrErr%c NonFatalErr%c FatalErr%c UnsupReq%c
RlxdOrd%c ExtTag%c PhantFunc%c AuxPwr%c NoSnoop%c
MaxPayload %d bytes, MaxReadReq %d bytes
DevSta: CorrErr%c NonFatalErr%c FatalErr%c UnsupReq%c AuxPwr%c TransPend%c
LnkCap: Port #%d, Speed %s, Width x%d, ASPM %s ClockPM%c Surprise%c LLActRep%c BwNot%c ASPMOptComp%c
Disabled%c CommClk%c
ExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c
LnkSta: Speed %s (%s), Width x%d (%s)
TrErr%c Train%c SlotClk%c DLActive%c BWMgmt%c ABWMgmt%c
SltCap: AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c
Slot #%d, PowerLimit %.3fW; Interlock%c NoCompl%c
SltCtl: Enable: AttnBtn%c PwrFlt%c MRL%c PresDet%c CmdCplt%c HPIrq%c LinkChg%c
Control: AttnInd %s, PwrInd %s, Power%c Interlock%c
SltSta: Status: AttnBtn%c PowerFlt%c MRL%c CmdCplt%c PresDet%c Interlock%c
Changed: MRL%c PresDet%c LinkState%c
RootCtl: ErrCorrectable%c ErrNon-Fatal%c ErrFatal%c PMEIntEna%c CRSVisible%c
RootSta: PME ReqID %04x, PMEStatus%c PMEPending%c
DevCap2: Completion Timeout: %s, TimeoutDis%c NROPrPrP%c LTR%c
10BitTagComp%c 10BitTagReq%c OBFF %s, ExtFmt%c EETLPPrefix%c
EmergencyPowerReduction %s, EmergencyPowerReductionInit%c DevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c OBFF %s, LnkCap2: Supported Link Speeds: %s, Crosslink%c Retimer%c 2Retimers%c DRS%c
LnkCtl2: Target Link Speed: %s, EnterCompliance%c SpeedDis%c
Transmit Margin: %s, EnterModifiedCompliance%c ComplianceSOS%c
Compliance De-emphasis: %s
LnkSta2: Current De-emphasis Level: %s, EqualizationComplete%c EqualizationPhase1%c
EqualizationPhase2%c EqualizationPhase3%c LinkEqualizationRequest%c
Retimer%c 2Retimers%c CrosslinkRes: %s , DRS%c
DownstreamComp: %s
Command: WarmRst%c DblEnd%c DevNum=%u ChainSide%c HostHide%c Slave%c MSI-X: Enable%c Count=%d Masked%c
Vector table: BAR=%d offset=%08x
Enhanced Allocation (EA): NumEntries=%u , secondary=%d, subordinate=%d Entry %u: Enable%c Writable%c EntrySize=%u
BAR Equivalent Indicator: Link Config 1: MLWI=%s MLWO=%s LWI=%s LWO=%s
Link Config 0: MLWI=%s MLWO=%s LWI=%s LWO=%s
I/O space VF memory space, prefetchable entry unavailable for use not supported L0s 2.5GT/s unknown downgraded ok strange Not Supported Range A Range B Range AB Range BC Range ABC Range BCD Range ABCD Via message Via WAKE# Via message/WAKE# Form Factor Dev Specific 64byte cachelines 128byte cachelines TPHComp+ ExtTPHComp- TPHComp+ ExtTPHComp+ TPHComp- ExtTPHComp- Disabled Via message A Via message B 50us to 50ms 50us to 100us 1ms to 10ms 16ms to 55ms 65ms to 210ms 260ms to 900ms 1s to 3.5s 4s to 13s 17s to 64s RsvdP 2.5-32GT/s 2.5-16GT/s 2.5-8GT/s 2.5-5GT/s -6dB -3.5dB Normal Operating Range unsupported Upstream Port Downstream Port incomplete Link Down - Not Determined Link Down - Not Present Link Down - Present Link Up - Present L0s L1 Express (v%d) Legacy Endpoint Root Port (Slot%c) Downstream Port (Slot%c) Root Complex Event Collector , MSI %02x
Unknown type %d , Latency L0s %s, L1 %s ExtTag%c AttnBtn%c AttnInd%c PwrInd%c RBE%c FLReset%c SlotPowerLimit %.3fW BrConfRtry%c , Exit Latency L0s %s %sL1 %s LnkCtl: ASPM %s; RCB %d bytes, RootCap: CRSVisible%c
, MaxEETLPPrefixes %d
FRS%c LN System CLS %s, ARIFwd%c
Routing%c 32bit%c 64bit%c 128bitCAS%c AtomicOpsCtl: ReqEn%c EgressBlck%c , Selectable De-emphasis: %s AtomicOpsCap: x%d simple Capabilities: [%02x] Null Power Management version %d
Bridge: PM%c B3%c
AGP version %x.%x
CompactPCI hot-swap PCI-X non-bridge device PCI-X bridge device DUL%c Revision ID: %u.%02u
Link Frequency 0: %s
Link Frequency 1: %s
Bus Number: %02x
Link Frequency: %s
HyperTransport: Switch HyperTransport: DirectRoute HyperTransport: VCSet HyperTransport: Retry Mode HyperTransport: #%02x
Hot-plug capable AGP3 Secure device PBA: BAR=%d offset=%08x
SATA HBA v%d.%d BAR%d Offset=%08x
InCfgSpace BAR??%d
PCI Advanced Features AFCap: TP%c FLR%c
AFCtrl: FLR%c
AFStatus: TP%c
resource behind function not indicated expansion ROM VF-BAR %u reserved PrimaryProperties: [%02x]
SecondaryProperties: Base: MaxOffset: Capability ID %#02x [%04x]
Address: %08x Data: %04x
On Blink Off L0s Enabled L0s L1 Enabled <64ns <128ns <256ns <512ns <1us <2us <4us unlimited <8us <16us <32us <64us 200MHz 300MHz 400MHz 500MHz 600MHz 800MHz 1.0GHz 1.2GHz 1.4GHz 1.6GHz [a] [b] [c] [d] [e] Vend 8bit 16bit [2] 32bit 4bit [6] N/C conv 66MHz 100MHz 133MHz ?4 ?5 ?6 ?7 L N N NMML8M`MMXGUXXXH_H_XXH_H_H_H_H_H_X|X$_^^^T[^XZZ^^[[^^ZZ^^([ [MM^ _^^ ^0]^ ^]]^0^_^ZH^^^_ ^Z0^aaaaaakinn`nmngPg8gfffeffg(ed dkrrrrrrqqp4r4r4r4r4r4r ?=
#
BAR=%d offset=%08x size=%08x %dMB %dGB %dTB %dPB %dEB BAR %d: current size: , supported: 00000000 [none] ff-00 [none] 32 64 Capabilities: [%03x v%d Advanced Error Reporting ErrorSrc: ERR_COR: %04x ERR_FATAL/NONFATAL: %04x
Downstream Port Containment Source: %04x
Virtual Channel ??%d %c%s%c
Ctrl: ArbSelect=%s
Status: InProgress%c
VC%d: Arb: Port Arbitration Table Power Budgeting Root Complex Link Link%d: Addr: %08x%08x
RCiEPBitmap: RCiEP at Device(s): %s %u -%u AssociatedBusNumbers: %s
ID=%04x Rev=%d Len=%03x
Access Control Services IOVSta: Migration%c
Initial VFs: %d, Total VFs: %d, Number of VFs: %d, VF offset: %d, stride: %d, Device ID: %04x
Supported Page Size: %08x, System Page Size: %08x
Region %d: Memory at Multicast McastCap: MaxGroups %d , WindowSz %d (%d bytes) , ECRCRegen%c
(disabled) , BaseAddr %016lx
Page Request Interface (PRI) PRICtl: Enable%c Reset%c
Physical %s Resizable BAR
Dynamic Power Allocation Transaction Processing Hints Extended requester support No steering table available Latency Tolerance Reporting Max snoop latency: %lldns
Secondary PCI Express LaneErrStat: LaneErr at lane: Protocol Multiplexing LN Requester L1 PM Substates L1SubCap: PortTPowerOnTime=%dus
PortTPowerOnTime= T_CommonMode=%dus LTR1.2_Threshold= LTR1.2_Threshold=%lldns L1SubCtl2: T_PwrOn=%dus T_PwrOn= Precision Time Measurement PTMCap: PTMClockGranularity: Unimplemented Greater than 254ns %huns
PTMControl: Enabled:%c RootSelected:%c
PTMEffectiveGranularity: PCI Express over M_PHY FRS Queueing Readiness Time Reporting Designated Vendor-Specific: : CXL CXLSta: Viral%c
Virtual Data Link Feature Physical Layer 16.0 GT/s Hierarchy ID Extended Capability ID %#02x
MemMapped Config
UESta: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c
UEMsk: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c
UESvrt: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c
CESta: RxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c AdvNonFatalErr%c
CEMsk: RxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c AdvNonFatalErr%c
AERCap: First Error Pointer: %02x, ECRCGenCap%c ECRCGenEn%c ECRCChkCap%c ECRCChkEn%c
MultHdrRecCap%c MultHdrRecEn%c TLPPfxPres%c HdrLogCap%c
HeaderLog: %08x %08x %08x %08x
RootCmd: CERptEn%c NFERptEn%c FERptEn%c
RootSta: CERcvd%c MultCERcvd%c UERcvd%c MultUERcvd%c
FirstFatal%c NonFatalMsg%c FatalMsg%c IntMsg %d
DpcCap: INT Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c
DpcCtl: Trigger:%x Cmpl%c INT%c ErrCor%c PoisonedTLP%c SwTrigger%c DL_ActiveErr%c
DpcSta: Trigger%c Reason:%02x INT%c RPBusy%c TriggerExt:%02x RP PIO ErrPtr:%02x
Caps: LPEVC=%d RefClk=%s PATEntryBits=%d
Port Arbitration Table [%x]
Caps: PATOffset=%02x MaxTimeSlots=%d RejSnoopTrans%c
Ctrl: Enable%c ID=%d ArbSelect=%s TC/VC=%02x
Status: NegoPending%c InProgress%c
Device Serial Number %02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x
Desc: PortNumber=%02x ComponentID=%02x EltType=%s
Addr: %02x:%02x.%d CfgSpace=%08x%08x
Root Complex Internal Link Root Complex Event Collector Endpoint Association AssociatedBusNumbers: %02x-%02x
Multi-Function Virtual Channel Root Complex Register Block ACSCap: SrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c DirectTrans%c
ACSCtl: SrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c DirectTrans%c
Alternative Routing-ID Interpretation (ARI) ARICap: MFVC%c ACS%c, Next Function: %d
ARICtl: MFVC%c ACS%c, Function Group: %d
Address Translation Service (ATS) ATSCap: Invalidate Queue Depth: %02x
ATSCtl: Enable%c, Smallest Translation Unit: %02x
Single Root I/O Virtualization (SR-IOV) IOVCap: Migration%c, Interrupt Message Number: %03x
IOVCtl: Enable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c
Function Dependency Link: %02x
%08x (%s-bit, %sprefetchable)
VF Migration: offset: %08x, BIR: %x
Multi-Root I/O Virtualization McastCtl: NumGroups %d, Enable%c
McastBAR: IndexPos %d, BaseAddr %016lx
McastReceiveVec: %016lx
McastBlockAllVec: %016lx
McastBlockUntransVec: %016lx
McastOverlayBAR: OverlaySize %d PRISta: RF%c UPRGI%c Stopped%c
Page Request Capacity: %08x, Page Request Allocation: %08x
Interrupt vector mode supported Device specific mode supported Steering table in TPH capability structure Steering table in MSI-X table Reserved steering table location Max no snoop latency: %lldns
LnkCtl3: LnkEquIntrruptEn%c PerformEqu%c
Process Address Space ID (PASID) PASIDCap: Exec%c Priv%c, Max PASID Width: %02x
PASIDCtl: Enable%c Exec%c Priv%c
PCI-PM_L1.2%c PCI-PM_L1.1%c ASPM_L1.2%c ASPM_L1.1%c L1_PM_Substates%c
PortCommonModeRestoreTime=%dus L1SubCtl1: PCI-PM_L1.2%c PCI-PM_L1.1%c ASPM_L1.2%c ASPM_L1.1%c
Requester:%c Responder:%c Root:%c
Vendor=%04x ID=%04x Rev=%d Len=%d CXLCap: Cache%c IO%c Mem%c Mem HW Init%c HDMCount %d Viral%c
CXLCtl: Cache%c IO%c Mem%c Cache SF Cov %d Cache SF Gran %d Cache Clean%c Viral%c
Lane Margining at the Receiver Native PCIe Enclosure Management Desc: TargetPort=%02x TargetComponent=%02x AssocRCRB%c LinkType=%s LinkValid%c
8 ؋@P8 ȁXpX~h~p| {ypyXy@yx`xPx@x0x xw Config Egress Internal Fixed WRR32 WRR64 WRR128 TWRR128 WRR256 ??6 ??7 Fixed WRR32 WRR64 WRR128 ??4 ??5 ??6 ??7 100ns sysfs.path Kernel modules: Kernel driver in use: %s
%s %s Driver: %s
Module: %s
%s/devices/%04x:%02x:%02x.%d/driver show_driver: sysfs device name too long, why? lspci: Unable to initialize libkmod context
lspci: Unable to load libkmod resources: error %d
lspci: libkmod lookup failed: error %d
-- +- \- +-[%04x:%02x]- \-[%04x:%02x]- %02x.%x -[%02x]- -[%02x-%02x]- %s %04x:%02x: Tree: bridge %04x:%02x:%02x.%d: %02x -> %02x-%02x
## %02x:%02x.%d is a bridge from %02x to %02x-%02x
!!! Bridge points to invalid primary bus. !!! Bridge points to invalid bus range. Discovered device %02x:%02x.%d
WARNING: Bus mapping can be reliable only with direct hardware access enabled.
Mapping bus %02x
But it was filtered out.
Summary of buses:
%02x: Entered via %02x:%02x.%d
Primary host bus Secondary host bus (?) %02x.%d Bridge to %02x-%02x dump.name help Known PCI access methods:
Known PCI access parameters:
%-20s %s (%s)
Unable to allocate %d bytes of memory Unknown hardware configuration type %s No such PCI access method: %s (see `-A help' for a list) Invalid PCI access parameter syntax: %s Unrecognized PCI access parameter: %s (see `-O help' for a list) XXXX0 XXXXXX0; : d D4 L T` | 4 4, d@ $ 4$ L 4 dH d
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FBH T * \L h FFE A(A08
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DAD V
DAE h(]0`(A $ . EMH QAA $ $ < EMH ]AA $ L R EMF rAA H t @` BGB B(D0A8DpQ
8A0A(B BBBG ` T? BBB B(A0C8GP
8F0A(B BBBJ $8A0A(B BBB H $ 0' FJI E(J0r
(A ABBH (A ABB T p BAD KJ
AABH ;FHAFHIL m BBA D(GD
(A ABBF dFHF s FEB B(A0A8DG
8A0A(B BBBJ {
8F0A(B BBBF 0BIEBAFHUFIHCFLESRUZBCLEBENRRUZFJMA`MMA 0 8 FDC M
ABC ( l BHD b
ABE ( lI BDD {AB L FBL B(A0A8G
8A0A(B BBBG ( W BNE B(D0I8Ip+xANxApxXGxBpxBFEFHKpa
8C0A(B BBBH xIIKNpxIIKNpx[JxApxCTxIpxAOxBpJxMHxApyxAOxFpxIIKKpxVPxAp H @ : BHB E(D0W
(A BBBE T(A BBB h:' FBB B(A0H8Jz
8A0A(B BBBE =FHF=DEMUHIFFFPXWWYNNUHjFKYBPEDIJDGAY}EMKIHKYU`LDYL_WW_SWZr{GHFaGPESL[Tb].DEEAIFENwURXIIKBAABBBBAFI[)]UZD]UZVLZOp DEEAIFENlWBEDEEAIFEN@KBAABBBBAFI[LULs | |
h_ FDB L(A0C8P@Y
8M0F(B BBBH
8F0A(B BBBE ^8A0A(B BBB
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8A0A(B BBBA D
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8A0A(B BBBD !A!Q!B! !S!n!E!q!I!J!I!P!x!I!v!D!!C!S!E!E!H!H!I!P!!H!H!I!P!}!N!T!D!]!K!k!A!!N!T!A!!I!^!K!I!q!D!G!E!E!E!C!I!e!!D!G!E!E!E!C!I!e!!D!G!E!E!E!C!I!e!u!Z!C!F!q!Z!D!F!!E!I!I!E!F!P!!Z!Q!W!F!T
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(G BBBJ X(G BBB L BBI E(D0d
(D BBBL W
(D BBBE @ PF BBB N(D0Ns
0A(A BBBG X \B FBB B(A0A8N@HFPKHA@Q
8A0A(B BBBI 4 t P FAD N
AABB , BRE Y
ABK T X BJD A(D0x8E@H8E0^
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]! h p o o o o o L [! P ` p 0 @ P ` p 0 @ P ` p 0 @ P ` p ! ! Usage: lspci []
Basic display modes:
-mm Produce machine-readable output (single -m for an obsolete format)
-t Show bus tree
Display options:
-v Be verbose (-vv or -vvv for higher verbosity)
-k Show kernel drivers handling each device
-x Show hex-dump of the standard part of the config space
-xxx Show hex-dump of the whole config space (dangerous; root only)
-xxxx Show hex-dump of the 4096-byte extended config space (root only)
-b Bus-centric view (addresses and IRQ's as seen by the bus)
-D Always show domain numbers
-P Display bridge path in addition to bus and device number
-PP Display bus path in addition to bus and device number
Resolving of device ID's to names:
-n Show numeric ID's
-nn Show both textual and numeric ID's (names & numbers)
-q Query the PCI ID database for unknown ID's via DNS
-qq As above, but re-query locally cached entries
-Q Query the PCI ID database for all ID's via DNS
Selection of devices:
-s [[[[]:]]:][][.[]] Show only devices in selected slots
-d []:[][:] Show only devices with specified ID's
Other options:
-i Use specified ID database instead of %s
-p Look up kernel modules in a given file instead of default modules.pcimap
-M Enable `bus mapping' mode (dangerous; root only)
PCI access options:
-A Use the specified PCI access method (see `-A help' for a list)
-O = Set PCI access parameter (see `-O help' for a list)
-G Enable PCI access debugging
-H Use direct hardware access ( = 1 or 2)
-F Read PCI configuration dump from a given file
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