/usr/src/kernels/4.18.0-553.121.1.el8_10.x86_64/include/linux/irqchip
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arm-gic-common.h7720644editdlrm
arm-gic-v3.h248750644editdlrm
arm-gic-v4.h40830644editdlrm
arm-gic.h56730644editdlrm
arm-vgic-info.h8490644editdlrm
arm-vic.h14300644editdlrm
chained_irq.h14710644editdlrm
ingenic.h7590644editdlrm
irq-bcm2836.h23950644editdlrm
irq-omap-intc.h9770644editdlrm
irq-partition-percpu.h17470644editdlrm
irq-sa11x0.h5020644editdlrm
mmp.h1550644editdlrm
mxs.h3670644editdlrm
versatile-fpga.h3530644editdlrm
xtensa-mx.h4670644editdlrm
xtensa-pic.h5320644editdlrm
Edit: /usr/src/kernels/4.18.0-553.121.1.el8_10.x86_64/include/linux/irqchip/chained_irq.h (1471B)
/* * Chained IRQ handlers support. * * Copyright (C) 2011 ARM Ltd. * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ #ifndef __IRQCHIP_CHAINED_IRQ_H #define __IRQCHIP_CHAINED_IRQ_H #include /* * Entry/exit functions for chained handlers where the primary IRQ chip * may implement either fasteoi or level-trigger flow control. */ static inline void chained_irq_enter(struct irq_chip *chip, struct irq_desc *desc) { /* FastEOI controllers require no action on entry. */ if (chip->irq_eoi) return; if (chip->irq_mask_ack) { chip->irq_mask_ack(&desc->irq_data); } else { chip->irq_mask(&desc->irq_data); if (chip->irq_ack) chip->irq_ack(&desc->irq_data); } } static inline void chained_irq_exit(struct irq_chip *chip, struct irq_desc *desc) { if (chip->irq_eoi) chip->irq_eoi(&desc->irq_data); else chip->irq_unmask(&desc->irq_data); } #endif /* __IRQCHIP_CHAINED_IRQ_H */