Name	Size	Mode	Actions
dw.h	1521	0644	editdlrm
hsu.h	1783	0644	editdlrm
idma64.h	310	0644	editdlrm
ipu-dma.h	4249	0644	editdlrm
mmp-pdma.h	317	0644	editdlrm
pxa-dma.h	481	0644	editdlrm
qcom_bam_dma.h	2197	0644	editdlrm
sprd-dma.h	2044	0644	editdlrm
xilinx_dma.h	1169	0644	editdlrm

/* * Xilinx DMA Engine drivers support header file * * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved. * * This is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ #ifndef __DMA_XILINX_DMA_H #define __DMA_XILINX_DMA_H #include #include /** * struct xilinx_vdma_config - VDMA Configuration structure * @frm_dly: Frame delay * @gen_lock: Whether in gen-lock mode * @master: Master that it syncs to * @frm_cnt_en: Enable frame count enable * @park: Whether wants to park * @park_frm: Frame to park on * @coalesc: Interrupt coalescing threshold * @delay: Delay counter * @reset: Reset Channel * @ext_fsync: External Frame Sync source */ struct xilinx_vdma_config { int frm_dly; int gen_lock; int master; int frm_cnt_en; int park; int park_frm; int coalesc; int delay; int reset; int ext_fsync; }; int xilinx_vdma_channel_set_config(struct dma_chan *dchan, struct xilinx_vdma_config *cfg); #endif