FM / spi

/usr/src/kernels/4.18.0-553.157.1.el8_10.x86_64/include/linux/spi/

/usr/src/kernels/4.18.0-553.157.1.el8_10.x86_64/include/linux/spi

Name	Size	Mode	Actions
ad7877.h	835	0644	edit dl rm
adi_spi3.h	15467	0644	edit dl rm
ads7846.h	2065	0644	edit dl rm
at73c213.h	828	0644	edit dl rm
at86rf230.h	724	0644	edit dl rm
cc2520.h	620	0644	edit dl rm
corgi_lcd.h	460	0644	edit dl rm
ds1305.h	1107	0644	edit dl rm
eeprom.h	1217	0644	edit dl rm
flash.h	1023	0644	edit dl rm
ifx_modem.h	616	0644	edit dl rm
l4f00242t03.h	847	0644	edit dl rm
libertas_spi.h	907	0644	edit dl rm
lms283gf05.h	775	0644	edit dl rm
max7301.h	939	0644	edit dl rm
mc33880.h	196	0644	edit dl rm
mcp23s08.h	685	0644	edit dl rm
mmc_spi.h	1958	0644	edit dl rm
mxs-spi.h	5367	0644	edit dl rm
pxa2xx_spi.h	1535	0644	edit dl rm
rspi.h	715	0644	edit dl rm
s3c24xx.h	816	0644	edit dl rm
sh_hspi.h	572	0644	edit dl rm
sh_msiof.h	357	0644	edit dl rm
spi-fsl-dspi.h	955	0644	edit dl rm
spi-mem.h	7063	0644	edit dl rm
spi.h	51523	0644	edit dl rm
spi_bitbang.h	1544	0644	edit dl rm
spi_gpio.h	724	0644	edit dl rm
spi_oc_tiny.h	628	0644	edit dl rm
tdo24m.h	210	0644	edit dl rm
tle62x0.h	660	0644	edit dl rm
xilinx_spi.h	627	0644	edit dl rm

Edit: /usr/src/kernels/4.18.0-553.157.1.el8_10.x86_64/include/linux/spi/eeprom.h (1217B)

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __LINUX_SPI_EEPROM_H
#define __LINUX_SPI_EEPROM_H

#include <linux/memory.h>

/*
 * Put one of these structures in platform_data for SPI EEPROMS handled
 * by the "at25" driver.  On SPI, most EEPROMS understand the same core
 * command set.  If you need to support EEPROMs that don't yet fit, add
 * flags to support those protocol options.  These values all come from
 * the chip datasheets.
 */
struct spi_eeprom {
	u32		byte_len;
	char		name[10];
	u16		page_size;		/* for writes */
	u16		flags;
#define	EE_ADDR1	0x0001			/*  8 bit addrs */
#define	EE_ADDR2	0x0002			/* 16 bit addrs */
#define	EE_ADDR3	0x0004			/* 24 bit addrs */
#define	EE_READONLY	0x0008			/* disallow writes */

/*
	 * Certain EEPROMS have a size that is larger than the number of address
	 * bytes would allow (e.g. like M95040 from ST that has 512 Byte size
	 * but uses only one address byte (A0 to A7) for addressing.) For
	 * the extra address bit (A8, A16 or A24) bit 3 of the instruction byte
	 * is used. This instruction bit is normally defined as don't care for
	 * other AT25 like chips.
	 */
#define EE_INSTR_BIT3_IS_ADDR	0x0010

void *context;
};

#endif /* __LINUX_SPI_EEPROM_H */

/* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_SPI_EEPROM_H #define __LINUX_SPI_EEPROM_H #include /* * Put one of these structures in platform_data for SPI EEPROMS handled * by the "at25" driver. On SPI, most EEPROMS understand the same core * command set. If you need to support EEPROMs that don't yet fit, add * flags to support those protocol options. These values all come from * the chip datasheets. */ struct spi_eeprom { u32 byte_len; char name[10]; u16 page_size; /* for writes */ u16 flags; #define EE_ADDR1 0x0001 /* 8 bit addrs */ #define EE_ADDR2 0x0002 /* 16 bit addrs */ #define EE_ADDR3 0x0004 /* 24 bit addrs */ #define EE_READONLY 0x0008 /* disallow writes */ /* * Certain EEPROMS have a size that is larger than the number of address * bytes would allow (e.g. like M95040 from ST that has 512 Byte size * but uses only one address byte (A0 to A7) for addressing.) For * the extra address bit (A8, A16 or A24) bit 3 of the instruction byte * is used. This instruction bit is normally defined as don't care for * other AT25 like chips. */ #define EE_INSTR_BIT3_IS_ADDR 0x0010 void *context; }; #endif /* __LINUX_SPI_EEPROM_H */