/
usr
/
include
/
linux
/
/usr/include/linux
mkdir
upload
Name
Size
Mode
Actions
android/
-
0755
rm
byteorder/
-
0755
rm
caif/
-
0755
rm
can/
-
0755
rm
cifs/
-
0755
rm
dvb/
-
0755
rm
genwqe/
-
0755
rm
hdlc/
-
0755
rm
hsi/
-
0755
rm
iio/
-
0755
rm
isdn/
-
0755
rm
mmc/
-
0755
rm
netfilter/
-
0755
rm
netfilter_arp/
-
0755
rm
netfilter_bridge/
-
0755
rm
netfilter_ipv4/
-
0755
rm
netfilter_ipv6/
-
0755
rm
nfsd/
-
0755
rm
raid/
-
0755
rm
sched/
-
0755
rm
spi/
-
0755
rm
sunrpc/
-
0755
rm
tc_act/
-
0755
rm
tc_ematch/
-
0755
rm
usb/
-
0755
rm
wimax/
-
0755
rm
a.out.h
6892
0644
edit
dl
rm
acct.h
3733
0644
edit
dl
rm
adb.h
1140
0644
edit
dl
rm
adfs_fs.h
936
0644
edit
dl
rm
affs_hardblocks.h
1544
0644
edit
dl
rm
agpgart.h
3940
0644
edit
dl
rm
aio_abi.h
3417
0644
edit
dl
rm
am437x-vpfe.h
3681
0644
edit
dl
rm
apm_bios.h
3683
0644
edit
dl
rm
arcfb.h
213
0644
edit
dl
rm
arm_sdei.h
2751
0644
edit
dl
rm
aspeed-lpc-ctrl.h
1780
0644
edit
dl
rm
atalk.h
1023
0644
edit
dl
rm
atm.h
7888
0644
edit
dl
rm
atmapi.h
952
0644
edit
dl
rm
atmarp.h
1296
0644
edit
dl
rm
atmbr2684.h
3271
0644
edit
dl
rm
atmclip.h
576
0644
edit
dl
rm
atmdev.h
7677
0644
edit
dl
rm
atmioc.h
1646
0644
edit
dl
rm
atmlec.h
2381
0644
edit
dl
rm
atmmpc.h
4226
0644
edit
dl
rm
atmppp.h
639
0644
edit
dl
rm
atmsap.h
4970
0644
edit
dl
rm
atmsvc.h
1853
0644
edit
dl
rm
atm_eni.h
648
0644
edit
dl
rm
atm_he.h
406
0644
edit
dl
rm
atm_idt77105.h
955
0644
edit
dl
rm
atm_nicstar.h
1278
0644
edit
dl
rm
atm_tcp.h
1622
0644
edit
dl
rm
atm_zatm.h
1540
0644
edit
dl
rm
audit.h
20394
0644
edit
dl
rm
auto_dev-ioctl.h
4986
0644
edit
dl
rm
auto_fs.h
6428
0644
edit
dl
rm
auto_fs4.h
451
0644
edit
dl
rm
auxvec.h
1597
0644
edit
dl
rm
ax25.h
2824
0644
edit
dl
rm
b1lli.h
1717
0644
edit
dl
rm
batadv_packet.h
20495
0644
edit
dl
rm
batman_adv.h
11977
0644
edit
dl
rm
baycom.h
883
0644
edit
dl
rm
bcache.h
8366
0644
edit
dl
rm
bcm933xx_hcs.h
419
0644
edit
dl
rm
bfs_fs.h
1893
0644
edit
dl
rm
binfmts.h
628
0644
edit
dl
rm
blkpg.h
904
0644
edit
dl
rm
blktrace_api.h
4701
0644
edit
dl
rm
blkzoned.h
6608
0644
edit
dl
rm
bpf.h
228660
0644
edit
dl
rm
bpfilter.h
465
0644
edit
dl
rm
bpf_common.h
1367
0644
edit
dl
rm
bpf_perf_event.h
529
0644
edit
dl
rm
bpqether.h
981
0644
edit
dl
rm
bsg.h
2494
0644
edit
dl
rm
bt-bmc.h
572
0644
edit
dl
rm
btf.h
4796
0644
edit
dl
rm
btrfs.h
28913
0644
edit
dl
rm
btrfs_tree.h
25285
0644
edit
dl
rm
can.h
7881
0644
edit
dl
rm
capability.h
13521
0644
edit
dl
rm
capi.h
3124
0644
edit
dl
rm
cciss_defs.h
3281
0644
edit
dl
rm
cciss_ioctl.h
2761
0644
edit
dl
rm
cdrom.h
28859
0644
edit
dl
rm
cec-funcs.h
53901
0644
edit
dl
rm
cec.h
37691
0644
edit
dl
rm
cfm_bridge.h
1456
0644
edit
dl
rm
cgroupstats.h
2219
0644
edit
dl
rm
chio.h
5344
0644
edit
dl
rm
close_range.h
377
0644
edit
dl
rm
cm4000_cs.h
1806
0644
edit
dl
rm
cn_proc.h
3456
0644
edit
dl
rm
coda.h
17505
0644
edit
dl
rm
coda_psdev.h
783
0644
edit
dl
rm
coff.h
12476
0644
edit
dl
rm
connector.h
2253
0644
edit
dl
rm
const.h
788
0644
edit
dl
rm
coresight-stm.h
674
0644
edit
dl
rm
cramfs_fs.h
3555
0644
edit
dl
rm
cryptouser.h
3392
0644
edit
dl
rm
cuda.h
905
0644
edit
dl
rm
cyclades.h
17108
0644
edit
dl
rm
cycx_cfm.h
2990
0644
edit
dl
rm
dcbnl.h
25238
0644
edit
dl
rm
dccp.h
6436
0644
edit
dl
rm
devlink.h
21556
0644
edit
dl
rm
dlm.h
2553
0644
edit
dl
rm
dlmconstants.h
5080
0644
edit
dl
rm
dlm_device.h
2543
0644
edit
dl
rm
dlm_netlink.h
1159
0644
edit
dl
rm
dlm_plock.h
894
0644
edit
dl
rm
dm-ioctl.h
11400
0644
edit
dl
rm
dm-log-userspace.h
15191
0644
edit
dl
rm
dma-buf.h
5247
0644
edit
dl
rm
dn.h
4642
0644
edit
dl
rm
dqblk_xfs.h
9245
0644
edit
dl
rm
edd.h
5604
0644
edit
dl
rm
efs_fs_sb.h
2227
0644
edit
dl
rm
elf-em.h
2187
0644
edit
dl
rm
elf-fdpic.h
1124
0644
edit
dl
rm
elf.h
13471
0644
edit
dl
rm
elfcore.h
2995
0644
edit
dl
rm
errno.h
23
0644
edit
dl
rm
errqueue.h
1477
0644
edit
dl
rm
erspan.h
1059
0644
edit
dl
rm
ethtool.h
83855
0644
edit
dl
rm
ethtool_netlink.h
22826
0644
edit
dl
rm
eventpoll.h
2734
0644
edit
dl
rm
fadvise.h
842
0644
edit
dl
rm
falloc.h
3584
0644
edit
dl
rm
fanotify.h
5341
0644
edit
dl
rm
fb.h
16477
0644
edit
dl
rm
fcntl.h
4174
0644
edit
dl
rm
fd.h
11672
0644
edit
dl
rm
fdreg.h
5420
0644
edit
dl
rm
fib_rules.h
2036
0644
edit
dl
rm
fiemap.h
2775
0644
edit
dl
rm
filter.h
2216
0644
edit
dl
rm
firewire-cdev.h
43886
0644
edit
dl
rm
firewire-constants.h
3231
0644
edit
dl
rm
flat.h
2148
0644
edit
dl
rm
fou.h
694
0644
edit
dl
rm
fpga-dfl.h
8728
0644
edit
dl
rm
fs.h
13424
0644
edit
dl
rm
fsl_hypervisor.h
7301
0644
edit
dl
rm
fsmap.h
4393
0644
edit
dl
rm
fuse.h
23473
0644
edit
dl
rm
futex.h
4993
0644
edit
dl
rm
gameport.h
897
0644
edit
dl
rm
genetlink.h
2175
0644
edit
dl
rm
gen_stats.h
1526
0644
edit
dl
rm
gfs2_ondisk.h
14743
0644
edit
dl
rm
gigaset_dev.h
1442
0644
edit
dl
rm
gpio.h
6751
0644
edit
dl
rm
gsmmux.h
1041
0644
edit
dl
rm
gtp.h
681
0644
edit
dl
rm
hash_info.h
921
0644
edit
dl
rm
hdlc.h
637
0644
edit
dl
rm
hdlcdrv.h
2908
0644
edit
dl
rm
hdreg.h
22703
0644
edit
dl
rm
hid.h
1901
0644
edit
dl
rm
hiddev.h
6345
0644
edit
dl
rm
hidraw.h
1993
0644
edit
dl
rm
hpet.h
743
0644
edit
dl
rm
hsr_netlink.h
1081
0644
edit
dl
rm
hw_breakpoint.h
742
0644
edit
dl
rm
hyperv.h
11152
0644
edit
dl
rm
hysdn_if.h
1382
0644
edit
dl
rm
i2c-dev.h
2612
0644
edit
dl
rm
i2c.h
7132
0644
edit
dl
rm
i2o-dev.h
11555
0644
edit
dl
rm
i8k.h
1528
0644
edit
dl
rm
icmp.h
2975
0644
edit
dl
rm
icmpv6.h
4038
0644
edit
dl
rm
idxd.h
8417
0644
edit
dl
rm
if.h
10901
0644
edit
dl
rm
ife.h
351
0644
edit
dl
rm
if_addr.h
1886
0644
edit
dl
rm
if_addrlabel.h
721
0644
edit
dl
rm
if_alg.h
946
0644
edit
dl
rm
if_arcnet.h
3717
0644
edit
dl
rm
if_arp.h
6577
0644
edit
dl
rm
if_bonding.h
5291
0644
edit
dl
rm
if_bridge.h
19514
0644
edit
dl
rm
if_cablemodem.h
986
0644
edit
dl
rm
if_eql.h
1349
0644
edit
dl
rm
if_ether.h
8248
0644
edit
dl
rm
if_fc.h
1738
0644
edit
dl
rm
if_fddi.h
3748
0644
edit
dl
rm
if_frad.h
3019
0644
edit
dl
rm
if_hippi.h
4235
0644
edit
dl
rm
if_infiniband.h
1245
0644
edit
dl
rm
if_link.h
31005
0644
edit
dl
rm
if_ltalk.h
210
0644
edit
dl
rm
if_macsec.h
5832
0644
edit
dl
rm
if_packet.h
7919
0644
edit
dl
rm
if_phonet.h
424
0644
edit
dl
rm
if_plip.h
660
0644
edit
dl
rm
if_ppp.h
29
0644
edit
dl
rm
if_pppol2tp.h
3292
0644
edit
dl
rm
if_pppox.h
4879
0644
edit
dl
rm
if_slip.h
872
0644
edit
dl
rm
if_team.h
2600
0644
edit
dl
rm
if_tun.h
4098
0644
edit
dl
rm
if_tunnel.h
4512
0644
edit
dl
rm
if_vlan.h
1831
0644
edit
dl
rm
if_x25.h
881
0644
edit
dl
rm
if_xdp.h
3011
0644
edit
dl
rm
igmp.h
3064
0644
edit
dl
rm
ila.h
1246
0644
edit
dl
rm
in.h
10014
0644
edit
dl
rm
in6.h
7438
0644
edit
dl
rm
inet_diag.h
4672
0644
edit
dl
rm
inotify.h
3292
0644
edit
dl
rm
input-event-codes.h
28606
0644
edit
dl
rm
input.h
15985
0644
edit
dl
rm
in_route.h
936
0644
edit
dl
rm
ioctl.h
163
0644
edit
dl
rm
iommu.h
4904
0644
edit
dl
rm
io_uring.h
6207
0644
edit
dl
rm
ip.h
4728
0644
edit
dl
rm
ip6_tunnel.h
1953
0644
edit
dl
rm
ipc.h
2101
0644
edit
dl
rm
ipmi.h
15442
0644
edit
dl
rm
ipmi_bmc.h
464
0644
edit
dl
rm
ipmi_msgdefs.h
3430
0644
edit
dl
rm
ipmi_ssif_bmc.h
441
0644
edit
dl
rm
ipsec.h
947
0644
edit
dl
rm
ipv6.h
3967
0644
edit
dl
rm
ipv6_route.h
1908
0644
edit
dl
rm
ipx.h
2347
0644
edit
dl
rm
ip_vs.h
13631
0644
edit
dl
rm
irqnr.h
104
0644
edit
dl
rm
isdn.h
5774
0644
edit
dl
rm
isdnif.h
2370
0644
edit
dl
rm
isdn_divertif.h
1200
0644
edit
dl
rm
isdn_ppp.h
1923
0644
edit
dl
rm
iso_fs.h
6485
0644
edit
dl
rm
isst_if.h
5384
0644
edit
dl
rm
ivtv.h
3022
0644
edit
dl
rm
ivtvfb.h
1207
0644
edit
dl
rm
jffs2.h
7018
0644
edit
dl
rm
joystick.h
3434
0644
edit
dl
rm
kcm.h
822
0644
edit
dl
rm
kcmp.h
522
0644
edit
dl
rm
kcov.h
1099
0644
edit
dl
rm
kd.h
6253
0644
edit
dl
rm
kdev_t.h
383
0644
edit
dl
rm
kernel-page-flags.h
900
0644
edit
dl
rm
kernel.h
438
0644
edit
dl
rm
kernelcapi.h
1019
0644
edit
dl
rm
kexec.h
1835
0644
edit
dl
rm
keyboard.h
12783
0644
edit
dl
rm
keyctl.h
3500
0644
edit
dl
rm
kfd_ioctl.h
28814
0644
edit
dl
rm
kfd_sysfs.h
4350
0644
edit
dl
rm
kvm.h
61561
0644
edit
dl
rm
kvm_para.h
1001
0644
edit
dl
rm
l2tp.h
5591
0644
edit
dl
rm
libc-compat.h
8289
0644
edit
dl
rm
lightnvm.h
5042
0644
edit
dl
rm
limits.h
937
0644
edit
dl
rm
lirc.h
7813
0644
edit
dl
rm
llc.h
3164
0644
edit
dl
rm
loop.h
3497
0644
edit
dl
rm
lp.h
4190
0644
edit
dl
rm
lwtunnel.h
2179
0644
edit
dl
rm
magic.h
3531
0644
edit
dl
rm
major.h
4713
0644
edit
dl
rm
map_to_7segment.h
7251
0644
edit
dl
rm
matroxfb.h
1464
0644
edit
dl
rm
max2175.h
1035
0644
edit
dl
rm
mdio.h
17272
0644
edit
dl
rm
media-bus-format.h
6411
0644
edit
dl
rm
media.h
11382
0644
edit
dl
rm
mei.h
3475
0644
edit
dl
rm
membarrier.h
7899
0644
edit
dl
rm
memfd.h
1324
0644
edit
dl
rm
mempolicy.h
2231
0644
edit
dl
rm
meye.h
2529
0644
edit
dl
rm
mic_common.h
6519
0644
edit
dl
rm
mic_ioctl.h
2252
0644
edit
dl
rm
mii.h
9496
0644
edit
dl
rm
minix_fs.h
2122
0644
edit
dl
rm
mman.h
1385
0644
edit
dl
rm
mmtimer.h
2117
0644
edit
dl
rm
module.h
255
0644
edit
dl
rm
mount.h
4546
0644
edit
dl
rm
mpls.h
2302
0644
edit
dl
rm
mpls_iptunnel.h
761
0644
edit
dl
rm
mptcp.h
5608
0644
edit
dl
rm
mqueue.h
2201
0644
edit
dl
rm
mroute.h
5427
0644
edit
dl
rm
mroute6.h
4577
0644
edit
dl
rm
mrp_bridge.h
1708
0644
edit
dl
rm
msdos_fs.h
6963
0644
edit
dl
rm
msg.h
3374
0644
edit
dl
rm
mtio.h
8175
0644
edit
dl
rm
nbd-netlink.h
2408
0644
edit
dl
rm
nbd.h
3024
0644
edit
dl
rm
ncsi.h
3880
0644
edit
dl
rm
ndctl.h
6866
0644
edit
dl
rm
neighbour.h
5138
0644
edit
dl
rm
net.h
2085
0644
edit
dl
rm
netconf.h
614
0644
edit
dl
rm
netdevice.h
2253
0644
edit
dl
rm
netfilter.h
1820
0644
edit
dl
rm
netfilter_arp.h
445
0644
edit
dl
rm
netfilter_bridge.h
1168
0644
edit
dl
rm
netfilter_decnet.h
1979
0644
edit
dl
rm
netfilter_ipv4.h
2169
0644
edit
dl
rm
netfilter_ipv6.h
2189
0644
edit
dl
rm
netlink.h
11495
0644
edit
dl
rm
netlink_diag.h
1524
0644
edit
dl
rm
netrom.h
807
0644
edit
dl
rm
net_dropmon.h
2922
0644
edit
dl
rm
net_namespace.h
715
0644
edit
dl
rm
net_tstamp.h
5806
0644
edit
dl
rm
nexthop.h
1534
0644
edit
dl
rm
nfc.h
11209
0644
edit
dl
rm
nfs.h
4500
0644
edit
dl
rm
nfs2.h
1468
0644
edit
dl
rm
nfs3.h
2453
0644
edit
dl
rm
nfs4.h
6599
0644
edit
dl
rm
nfs4_mount.h
1932
0644
edit
dl
rm
nfsacl.h
718
0644
edit
dl
rm
nfs_fs.h
1641
0644
edit
dl
rm
nfs_idmap.h
2243
0644
edit
dl
rm
nfs_mount.h
2142
0644
edit
dl
rm
nilfs2_api.h
7589
0644
edit
dl
rm
nilfs2_ondisk.h
18033
0644
edit
dl
rm
nitro_enclaves.h
13152
0644
edit
dl
rm
nl80211.h
335264
0644
edit
dl
rm
nsfs.h
639
0644
edit
dl
rm
nubus.h
8191
0644
edit
dl
rm
nvme_ioctl.h
2112
0644
edit
dl
rm
nvram.h
532
0644
edit
dl
rm
n_r3964.h
2410
0644
edit
dl
rm
omap3isp.h
20853
0644
edit
dl
rm
omapfb.h
5918
0644
edit
dl
rm
oom.h
511
0644
edit
dl
rm
openat2.h
1289
0644
edit
dl
rm
openvswitch.h
40184
0644
edit
dl
rm
packet_diag.h
1672
0644
edit
dl
rm
param.h
141
0644
edit
dl
rm
parport.h
3644
0644
edit
dl
rm
patchkey.h
892
0644
edit
dl
rm
pci.h
1380
0644
edit
dl
rm
pcitest.h
711
0644
edit
dl
rm
pci_regs.h
57827
0644
edit
dl
rm
perf_event.h
40580
0644
edit
dl
rm
personality.h
2097
0644
edit
dl
rm
pfkeyv2.h
10569
0644
edit
dl
rm
pfrut.h
7987
0644
edit
dl
rm
pg.h
2394
0644
edit
dl
rm
phantom.h
1654
0644
edit
dl
rm
phonet.h
4677
0644
edit
dl
rm
pktcdvd.h
2687
0644
edit
dl
rm
pkt_cls.h
18511
0644
edit
dl
rm
pkt_sched.h
30296
0644
edit
dl
rm
pmu.h
5319
0644
edit
dl
rm
poll.h
22
0644
edit
dl
rm
posix_acl.h
1254
0644
edit
dl
rm
posix_acl_xattr.h
1115
0644
edit
dl
rm
posix_types.h
1098
0644
edit
dl
rm
ppdev.h
3211
0644
edit
dl
rm
ppp-comp.h
2527
0644
edit
dl
rm
ppp-ioctl.h
5475
0644
edit
dl
rm
ppp_defs.h
5107
0644
edit
dl
rm
pps.h
4734
0644
edit
dl
rm
pr.h
1073
0644
edit
dl
rm
prctl.h
8023
0644
edit
dl
rm
psample.h
2271
0644
edit
dl
rm
psci.h
4328
0644
edit
dl
rm
psp-sev.h
4586
0644
edit
dl
rm
ptp_clock.h
7456
0644
edit
dl
rm
ptrace.h
3674
0644
edit
dl
rm
qemu_fw_cfg.h
2469
0644
edit
dl
rm
qnx4_fs.h
2328
0644
edit
dl
rm
qnxtypes.h
624
0644
edit
dl
rm
qrtr.h
893
0644
edit
dl
rm
quota.h
6291
0644
edit
dl
rm
radeonfb.h
360
0644
edit
dl
rm
random.h
1370
0644
edit
dl
rm
raw.h
365
0644
edit
dl
rm
rds.h
9301
0644
edit
dl
rm
reboot.h
1343
0644
edit
dl
rm
reiserfs_fs.h
775
0644
edit
dl
rm
reiserfs_xattr.h
533
0644
edit
dl
rm
resource.h
2347
0644
edit
dl
rm
rfkill.h
6608
0644
edit
dl
rm
rio_cm_cdev.h
3248
0644
edit
dl
rm
rio_mport_cdev.h
9330
0644
edit
dl
rm
romfs_fs.h
1238
0644
edit
dl
rm
rose.h
2232
0644
edit
dl
rm
route.h
2332
0644
edit
dl
rm
rpmsg.h
544
0644
edit
dl
rm
rseq.h
4904
0644
edit
dl
rm
rtc.h
4009
0644
edit
dl
rm
rtnetlink.h
20201
0644
edit
dl
rm
rxrpc.h
5080
0644
edit
dl
rm
scc.h
4597
0644
edit
dl
rm
sched.h
2797
0644
edit
dl
rm
scif_ioctl.h
6382
0644
edit
dl
rm
screen_info.h
2479
0644
edit
dl
rm
sctp.h
35994
0644
edit
dl
rm
sdla.h
2839
0644
edit
dl
rm
seccomp.h
2257
0644
edit
dl
rm
securebits.h
2704
0644
edit
dl
rm
sed-opal.h
3275
0644
edit
dl
rm
seg6.h
1170
0644
edit
dl
rm
seg6_genl.h
589
0644
edit
dl
rm
seg6_hmac.h
423
0644
edit
dl
rm
seg6_iptunnel.h
927
0644
edit
dl
rm
seg6_local.h
2060
0644
edit
dl
rm
selinux_netlink.h
1195
0644
edit
dl
rm
sem.h
3043
0644
edit
dl
rm
serial.h
3866
0644
edit
dl
rm
serial_core.h
6245
0644
edit
dl
rm
serial_reg.h
15496
0644
edit
dl
rm
serio.h
2037
0644
edit
dl
rm
sev-guest.h
2303
0644
edit
dl
rm
shm.h
3785
0644
edit
dl
rm
signal.h
388
0644
edit
dl
rm
signalfd.h
1233
0644
edit
dl
rm
smc.h
8513
0644
edit
dl
rm
smc_diag.h
2728
0644
edit
dl
rm
smiapp.h
1058
0644
edit
dl
rm
snmp.h
13663
0644
edit
dl
rm
socket.h
901
0644
edit
dl
rm
sockios.h
6106
0644
edit
dl
rm
sock_diag.h
1301
0644
edit
dl
rm
sonet.h
2290
0644
edit
dl
rm
sonypi.h
5309
0644
edit
dl
rm
sound.h
1237
0644
edit
dl
rm
soundcard.h
46038
0644
edit
dl
rm
stat.h
6352
0644
edit
dl
rm
stddef.h
1532
0644
edit
dl
rm
stm.h
1275
0644
edit
dl
rm
string.h
238
0644
edit
dl
rm
suspend_ioctls.h
1431
0644
edit
dl
rm
swab.h
6921
0644
edit
dl
rm
switchtec_ioctl.h
5262
0644
edit
dl
rm
synclink.h
8985
0644
edit
dl
rm
sync_file.h
2883
0644
edit
dl
rm
sysctl.h
25842
0644
edit
dl
rm
sysinfo.h
1049
0644
edit
dl
rm
target_core_user.h
4633
0644
edit
dl
rm
taskstats.h
7180
0644
edit
dl
rm
tcp.h
9920
0644
edit
dl
rm
tcp_metrics.h
1549
0644
edit
dl
rm
tdx-guest.h
1305
0644
edit
dl
rm
tee.h
13165
0644
edit
dl
rm
termios.h
506
0644
edit
dl
rm
thermal.h
3309
0644
edit
dl
rm
time.h
1748
0644
edit
dl
rm
timerfd.h
936
0644
edit
dl
rm
times.h
278
0644
edit
dl
rm
timex.h
6403
0644
edit
dl
rm
time_types.h
1175
0644
edit
dl
rm
tiocl.h
1729
0644
edit
dl
rm
tipc.h
8825
0644
edit
dl
rm
tipc_config.h
14708
0644
edit
dl
rm
tipc_netlink.h
9395
0644
edit
dl
rm
tipc_sockets_diag.h
468
0644
edit
dl
rm
tls.h
4288
0644
edit
dl
rm
toshiba.h
1930
0644
edit
dl
rm
tty.h
1585
0644
edit
dl
rm
tty_flags.h
4527
0644
edit
dl
rm
types.h
1476
0644
edit
dl
rm
udf_fs_i.h
697
0644
edit
dl
rm
udp.h
1661
0644
edit
dl
rm
uhid.h
4648
0644
edit
dl
rm
uinput.h
9261
0644
edit
dl
rm
uio.h
732
0644
edit
dl
rm
uleds.h
798
0644
edit
dl
rm
ultrasound.h
4562
0644
edit
dl
rm
un.h
384
0644
edit
dl
rm
unistd.h
220
0644
edit
dl
rm
unix_diag.h
1253
0644
edit
dl
rm
usbdevice_fs.h
8317
0644
edit
dl
rm
usbip.h
640
0644
edit
dl
rm
userfaultfd.h
7774
0644
edit
dl
rm
userio.h
1516
0644
edit
dl
rm
utime.h
215
0644
edit
dl
rm
utsname.h
669
0644
edit
dl
rm
uuid.h
1356
0644
edit
dl
rm
uvcvideo.h
2635
0644
edit
dl
rm
v4l2-common.h
4177
0644
edit
dl
rm
v4l2-controls.h
51777
0644
edit
dl
rm
v4l2-dv-timings.h
31562
0644
edit
dl
rm
v4l2-mediabus.h
5101
0644
edit
dl
rm
v4l2-subdev.h
6096
0644
edit
dl
rm
vboxguest.h
8729
0644
edit
dl
rm
vbox_err.h
7257
0644
edit
dl
rm
vbox_vmmdev_types.h
8356
0644
edit
dl
rm
vdpa.h
1421
0644
edit
dl
rm
version.h
431
0644
edit
dl
rm
veth.h
224
0644
edit
dl
rm
vfio.h
52223
0644
edit
dl
rm
vfio_ccw.h
1317
0644
edit
dl
rm
vfio_zdev.h
2542
0644
edit
dl
rm
vhost.h
6418
0644
edit
dl
rm
vhost_types.h
3997
0644
edit
dl
rm
videodev2.h
90741
0644
edit
dl
rm
virtio_9p.h
2041
0644
edit
dl
rm
virtio_balloon.h
5274
0644
edit
dl
rm
virtio_blk.h
6797
0644
edit
dl
rm
virtio_bt.h
772
0644
edit
dl
rm
virtio_config.h
4005
0644
edit
dl
rm
virtio_console.h
3136
0644
edit
dl
rm
virtio_crypto.h
13874
0644
edit
dl
rm
virtio_fs.h
572
0644
edit
dl
rm
virtio_gpu.h
11454
0644
edit
dl
rm
virtio_ids.h
3269
0644
edit
dl
rm
virtio_input.h
2506
0644
edit
dl
rm
virtio_iommu.h
3783
0644
edit
dl
rm
virtio_mem.h
7157
0644
edit
dl
rm
virtio_mmio.h
4969
0644
edit
dl
rm
virtio_net.h
10549
0644
edit
dl
rm
virtio_pci.h
7406
0644
edit
dl
rm
virtio_ring.h
7497
0644
edit
dl
rm
virtio_rng.h
265
0644
edit
dl
rm
virtio_scsi.h
6035
0644
edit
dl
rm
virtio_snd.h
9304
0644
edit
dl
rm
virtio_types.h
2153
0644
edit
dl
rm
virtio_vsock.h
3086
0644
edit
dl
rm
vmcore.h
431
0644
edit
dl
rm
vm_sockets.h
6494
0644
edit
dl
rm
vm_sockets_diag.h
963
0644
edit
dl
rm
vsockmon.h
1885
0644
edit
dl
rm
vt.h
3059
0644
edit
dl
rm
vtpm_proxy.h
1719
0644
edit
dl
rm
wait.h
682
0644
edit
dl
rm
wanrouter.h
453
0644
edit
dl
rm
watchdog.h
2335
0644
edit
dl
rm
wimax.h
8371
0644
edit
dl
rm
wireless.h
42703
0644
edit
dl
rm
wmi.h
1886
0644
edit
dl
rm
x25.h
3562
0644
edit
dl
rm
xattr.h
2860
0644
edit
dl
rm
xdp_diag.h
1468
0644
edit
dl
rm
xfrm.h
11994
0644
edit
dl
rm
xilinx-v4l2-controls.h
2976
0644
edit
dl
rm
zorro.h
3296
0644
edit
dl
rm
zorro_ids.h
29963
0644
edit
dl
rm
Edit:
/usr/include/linux/mdio.h
(17272B)
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * linux/mdio.h: definitions for MDIO (clause 45) transceivers * Copyright 2006-2009 Solarflare Communications Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation, incorporated herein by reference. */ #ifndef __LINUX_MDIO_H__ #define __LINUX_MDIO_H__ #include <linux/types.h> #include <linux/mii.h> /* MDIO Manageable Devices (MMDs). */ #define MDIO_MMD_PMAPMD 1 /* Physical Medium Attachment/ * Physical Medium Dependent */ #define MDIO_MMD_WIS 2 /* WAN Interface Sublayer */ #define MDIO_MMD_PCS 3 /* Physical Coding Sublayer */ #define MDIO_MMD_PHYXS 4 /* PHY Extender Sublayer */ #define MDIO_MMD_DTEXS 5 /* DTE Extender Sublayer */ #define MDIO_MMD_TC 6 /* Transmission Convergence */ #define MDIO_MMD_AN 7 /* Auto-Negotiation */ #define MDIO_MMD_C22EXT 29 /* Clause 22 extension */ #define MDIO_MMD_VEND1 30 /* Vendor specific 1 */ #define MDIO_MMD_VEND2 31 /* Vendor specific 2 */ /* Generic MDIO registers. */ #define MDIO_CTRL1 MII_BMCR #define MDIO_STAT1 MII_BMSR #define MDIO_DEVID1 MII_PHYSID1 #define MDIO_DEVID2 MII_PHYSID2 #define MDIO_SPEED 4 /* Speed ability */ #define MDIO_DEVS1 5 /* Devices in package */ #define MDIO_DEVS2 6 #define MDIO_CTRL2 7 /* 10G control 2 */ #define MDIO_STAT2 8 /* 10G status 2 */ #define MDIO_PMA_TXDIS 9 /* 10G PMA/PMD transmit disable */ #define MDIO_PMA_RXDET 10 /* 10G PMA/PMD receive signal detect */ #define MDIO_PMA_EXTABLE 11 /* 10G PMA/PMD extended ability */ #define MDIO_PKGID1 14 /* Package identifier */ #define MDIO_PKGID2 15 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */ #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */ #define MDIO_PCS_EEE_ABLE 20 /* EEE Capability register */ #define MDIO_PCS_EEE_ABLE2 21 /* EEE Capability register 2 */ #define MDIO_PMA_NG_EXTABLE 21 /* 2.5G/5G PMA/PMD extended ability */ #define MDIO_PCS_EEE_WK_ERR 22 /* EEE wake error counter */ #define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */ #define MDIO_AN_EEE_ADV 60 /* EEE advertisement */ #define MDIO_AN_EEE_LPABLE 61 /* EEE link partner ability */ #define MDIO_AN_EEE_ADV2 62 /* EEE advertisement 2 */ #define MDIO_AN_EEE_LPABLE2 63 /* EEE link partner ability 2 */ /* Media-dependent registers. */ #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. * Lanes B-D are numbered 134-136. */ #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */ #define MDIO_PCS_10GBX_STAT1 24 /* 10GBASE-X PCS status 1 */ #define MDIO_PCS_10GBRT_STAT1 32 /* 10GBASE-R/-T PCS status 1 */ #define MDIO_PCS_10GBRT_STAT2 33 /* 10GBASE-R/-T PCS status 2 */ #define MDIO_AN_10GBT_CTRL 32 /* 10GBASE-T auto-negotiation control */ #define MDIO_AN_10GBT_STAT 33 /* 10GBASE-T auto-negotiation status */ /* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */ #define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */ #define MDIO_PMA_LASI_TXCTRL 0x9001 /* TX_ALARM control */ #define MDIO_PMA_LASI_CTRL 0x9002 /* LASI control */ #define MDIO_PMA_LASI_RXSTAT 0x9003 /* RX_ALARM status */ #define MDIO_PMA_LASI_TXSTAT 0x9004 /* TX_ALARM status */ #define MDIO_PMA_LASI_STAT 0x9005 /* LASI status */ /* Control register 1. */ /* Enable extended speed selection */ #define MDIO_CTRL1_SPEEDSELEXT (BMCR_SPEED1000 | BMCR_SPEED100) /* All speed selection bits */ #define MDIO_CTRL1_SPEEDSEL (MDIO_CTRL1_SPEEDSELEXT | 0x003c) #define MDIO_CTRL1_FULLDPLX BMCR_FULLDPLX #define MDIO_CTRL1_LPOWER BMCR_PDOWN #define MDIO_CTRL1_RESET BMCR_RESET #define MDIO_PMA_CTRL1_LOOPBACK 0x0001 #define MDIO_PMA_CTRL1_SPEED1000 BMCR_SPEED1000 #define MDIO_PMA_CTRL1_SPEED100 BMCR_SPEED100 #define MDIO_PCS_CTRL1_LOOPBACK BMCR_LOOPBACK #define MDIO_PHYXS_CTRL1_LOOPBACK BMCR_LOOPBACK #define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART #define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE #define MDIO_AN_CTRL1_XNP 0x2000 /* Enable extended next page */ #define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400 /* Stop the clock during LPI */ /* 10 Gb/s */ #define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00) /* 10PASS-TS/2BASE-TL */ #define MDIO_CTRL1_SPEED10P2B (MDIO_CTRL1_SPEEDSELEXT | 0x04) /* 2.5 Gb/s */ #define MDIO_CTRL1_SPEED2_5G (MDIO_CTRL1_SPEEDSELEXT | 0x18) /* 5 Gb/s */ #define MDIO_CTRL1_SPEED5G (MDIO_CTRL1_SPEEDSELEXT | 0x1c) /* Status register 1. */ #define MDIO_STAT1_LPOWERABLE 0x0002 /* Low-power ability */ #define MDIO_STAT1_LSTATUS BMSR_LSTATUS #define MDIO_STAT1_FAULT 0x0080 /* Fault */ #define MDIO_AN_STAT1_LPABLE 0x0001 /* Link partner AN ability */ #define MDIO_AN_STAT1_ABLE BMSR_ANEGCAPABLE #define MDIO_AN_STAT1_RFAULT BMSR_RFAULT #define MDIO_AN_STAT1_COMPLETE BMSR_ANEGCOMPLETE #define MDIO_AN_STAT1_PAGE 0x0040 /* Page received */ #define MDIO_AN_STAT1_XNP 0x0080 /* Extended next page status */ /* Speed register. */ #define MDIO_SPEED_10G 0x0001 /* 10G capable */ #define MDIO_PMA_SPEED_2B 0x0002 /* 2BASE-TL capable */ #define MDIO_PMA_SPEED_10P 0x0004 /* 10PASS-TS capable */ #define MDIO_PMA_SPEED_1000 0x0010 /* 1000M capable */ #define MDIO_PMA_SPEED_100 0x0020 /* 100M capable */ #define MDIO_PMA_SPEED_10 0x0040 /* 10M capable */ #define MDIO_PCS_SPEED_10P2B 0x0002 /* 10PASS-TS/2BASE-TL capable */ #define MDIO_PCS_SPEED_2_5G 0x0040 /* 2.5G capable */ #define MDIO_PCS_SPEED_5G 0x0080 /* 5G capable */ /* Device present registers. */ #define MDIO_DEVS_PRESENT(devad) (1 << (devad)) #define MDIO_DEVS_C22PRESENT MDIO_DEVS_PRESENT(0) #define MDIO_DEVS_PMAPMD MDIO_DEVS_PRESENT(MDIO_MMD_PMAPMD) #define MDIO_DEVS_WIS MDIO_DEVS_PRESENT(MDIO_MMD_WIS) #define MDIO_DEVS_PCS MDIO_DEVS_PRESENT(MDIO_MMD_PCS) #define MDIO_DEVS_PHYXS MDIO_DEVS_PRESENT(MDIO_MMD_PHYXS) #define MDIO_DEVS_DTEXS MDIO_DEVS_PRESENT(MDIO_MMD_DTEXS) #define MDIO_DEVS_TC MDIO_DEVS_PRESENT(MDIO_MMD_TC) #define MDIO_DEVS_AN MDIO_DEVS_PRESENT(MDIO_MMD_AN) #define MDIO_DEVS_C22EXT MDIO_DEVS_PRESENT(MDIO_MMD_C22EXT) #define MDIO_DEVS_VEND1 MDIO_DEVS_PRESENT(MDIO_MMD_VEND1) #define MDIO_DEVS_VEND2 MDIO_DEVS_PRESENT(MDIO_MMD_VEND2) /* Control register 2. */ #define MDIO_PMA_CTRL2_TYPE 0x000f /* PMA/PMD type selection */ #define MDIO_PMA_CTRL2_10GBCX4 0x0000 /* 10GBASE-CX4 type */ #define MDIO_PMA_CTRL2_10GBEW 0x0001 /* 10GBASE-EW type */ #define MDIO_PMA_CTRL2_10GBLW 0x0002 /* 10GBASE-LW type */ #define MDIO_PMA_CTRL2_10GBSW 0x0003 /* 10GBASE-SW type */ #define MDIO_PMA_CTRL2_10GBLX4 0x0004 /* 10GBASE-LX4 type */ #define MDIO_PMA_CTRL2_10GBER 0x0005 /* 10GBASE-ER type */ #define MDIO_PMA_CTRL2_10GBLR 0x0006 /* 10GBASE-LR type */ #define MDIO_PMA_CTRL2_10GBSR 0x0007 /* 10GBASE-SR type */ #define MDIO_PMA_CTRL2_10GBLRM 0x0008 /* 10GBASE-LRM type */ #define MDIO_PMA_CTRL2_10GBT 0x0009 /* 10GBASE-T type */ #define MDIO_PMA_CTRL2_10GBKX4 0x000a /* 10GBASE-KX4 type */ #define MDIO_PMA_CTRL2_10GBKR 0x000b /* 10GBASE-KR type */ #define MDIO_PMA_CTRL2_1000BT 0x000c /* 1000BASE-T type */ #define MDIO_PMA_CTRL2_1000BKX 0x000d /* 1000BASE-KX type */ #define MDIO_PMA_CTRL2_100BTX 0x000e /* 100BASE-TX type */ #define MDIO_PMA_CTRL2_10BT 0x000f /* 10BASE-T type */ #define MDIO_PMA_CTRL2_2_5GBT 0x0030 /* 2.5GBaseT type */ #define MDIO_PMA_CTRL2_5GBT 0x0031 /* 5GBaseT type */ #define MDIO_PCS_CTRL2_TYPE 0x0003 /* PCS type selection */ #define MDIO_PCS_CTRL2_10GBR 0x0000 /* 10GBASE-R type */ #define MDIO_PCS_CTRL2_10GBX 0x0001 /* 10GBASE-X type */ #define MDIO_PCS_CTRL2_10GBW 0x0002 /* 10GBASE-W type */ #define MDIO_PCS_CTRL2_10GBT 0x0003 /* 10GBASE-T type */ /* Status register 2. */ #define MDIO_STAT2_RXFAULT 0x0400 /* Receive fault */ #define MDIO_STAT2_TXFAULT 0x0800 /* Transmit fault */ #define MDIO_STAT2_DEVPRST 0xc000 /* Device present */ #define MDIO_STAT2_DEVPRST_VAL 0x8000 /* Device present value */ #define MDIO_PMA_STAT2_LBABLE 0x0001 /* PMA loopback ability */ #define MDIO_PMA_STAT2_10GBEW 0x0002 /* 10GBASE-EW ability */ #define MDIO_PMA_STAT2_10GBLW 0x0004 /* 10GBASE-LW ability */ #define MDIO_PMA_STAT2_10GBSW 0x0008 /* 10GBASE-SW ability */ #define MDIO_PMA_STAT2_10GBLX4 0x0010 /* 10GBASE-LX4 ability */ #define MDIO_PMA_STAT2_10GBER 0x0020 /* 10GBASE-ER ability */ #define MDIO_PMA_STAT2_10GBLR 0x0040 /* 10GBASE-LR ability */ #define MDIO_PMA_STAT2_10GBSR 0x0080 /* 10GBASE-SR ability */ #define MDIO_PMD_STAT2_TXDISAB 0x0100 /* PMD TX disable ability */ #define MDIO_PMA_STAT2_EXTABLE 0x0200 /* Extended abilities */ #define MDIO_PMA_STAT2_RXFLTABLE 0x1000 /* Receive fault ability */ #define MDIO_PMA_STAT2_TXFLTABLE 0x2000 /* Transmit fault ability */ #define MDIO_PCS_STAT2_10GBR 0x0001 /* 10GBASE-R capable */ #define MDIO_PCS_STAT2_10GBX 0x0002 /* 10GBASE-X capable */ #define MDIO_PCS_STAT2_10GBW 0x0004 /* 10GBASE-W capable */ #define MDIO_PCS_STAT2_RXFLTABLE 0x1000 /* Receive fault ability */ #define MDIO_PCS_STAT2_TXFLTABLE 0x2000 /* Transmit fault ability */ /* Transmit disable register. */ #define MDIO_PMD_TXDIS_GLOBAL 0x0001 /* Global PMD TX disable */ #define MDIO_PMD_TXDIS_0 0x0002 /* PMD TX disable 0 */ #define MDIO_PMD_TXDIS_1 0x0004 /* PMD TX disable 1 */ #define MDIO_PMD_TXDIS_2 0x0008 /* PMD TX disable 2 */ #define MDIO_PMD_TXDIS_3 0x0010 /* PMD TX disable 3 */ /* Receive signal detect register. */ #define MDIO_PMD_RXDET_GLOBAL 0x0001 /* Global PMD RX signal detect */ #define MDIO_PMD_RXDET_0 0x0002 /* PMD RX signal detect 0 */ #define MDIO_PMD_RXDET_1 0x0004 /* PMD RX signal detect 1 */ #define MDIO_PMD_RXDET_2 0x0008 /* PMD RX signal detect 2 */ #define MDIO_PMD_RXDET_3 0x0010 /* PMD RX signal detect 3 */ /* Extended abilities register. */ #define MDIO_PMA_EXTABLE_10GCX4 0x0001 /* 10GBASE-CX4 ability */ #define MDIO_PMA_EXTABLE_10GBLRM 0x0002 /* 10GBASE-LRM ability */ #define MDIO_PMA_EXTABLE_10GBT 0x0004 /* 10GBASE-T ability */ #define MDIO_PMA_EXTABLE_10GBKX4 0x0008 /* 10GBASE-KX4 ability */ #define MDIO_PMA_EXTABLE_10GBKR 0x0010 /* 10GBASE-KR ability */ #define MDIO_PMA_EXTABLE_1000BT 0x0020 /* 1000BASE-T ability */ #define MDIO_PMA_EXTABLE_1000BKX 0x0040 /* 1000BASE-KX ability */ #define MDIO_PMA_EXTABLE_100BTX 0x0080 /* 100BASE-TX ability */ #define MDIO_PMA_EXTABLE_10BT 0x0100 /* 10BASE-T ability */ #define MDIO_PMA_EXTABLE_NBT 0x4000 /* 2.5/5GBASE-T ability */ /* PHY XGXS lane state register. */ #define MDIO_PHYXS_LNSTAT_SYNC0 0x0001 #define MDIO_PHYXS_LNSTAT_SYNC1 0x0002 #define MDIO_PHYXS_LNSTAT_SYNC2 0x0004 #define MDIO_PHYXS_LNSTAT_SYNC3 0x0008 #define MDIO_PHYXS_LNSTAT_ALIGN 0x1000 /* PMA 10GBASE-T pair swap & polarity */ #define MDIO_PMA_10GBT_SWAPPOL_ABNX 0x0001 /* Pair A/B uncrossed */ #define MDIO_PMA_10GBT_SWAPPOL_CDNX 0x0002 /* Pair C/D uncrossed */ #define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100 /* Pair A polarity reversed */ #define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200 /* Pair B polarity reversed */ #define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400 /* Pair C polarity reversed */ #define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800 /* Pair D polarity reversed */ /* PMA 10GBASE-T TX power register. */ #define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 /* Short-reach mode */ /* PMA 10GBASE-T SNR registers. */ /* Value is SNR margin in dB, clamped to range [-127, 127], plus 0x8000. */ #define MDIO_PMA_10GBT_SNR_BIAS 0x8000 #define MDIO_PMA_10GBT_SNR_MAX 127 /* PMA 10GBASE-R FEC ability register. */ #define MDIO_PMA_10GBR_FECABLE_ABLE 0x0001 /* FEC ability */ #define MDIO_PMA_10GBR_FECABLE_ERRABLE 0x0002 /* FEC error indic. ability */ /* PCS 10GBASE-R/-T status register 1. */ #define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 /* Block lock attained */ /* PCS 10GBASE-R/-T status register 2. */ #define MDIO_PCS_10GBRT_STAT2_ERR 0x00ff #define MDIO_PCS_10GBRT_STAT2_BER 0x3f00 /* AN 10GBASE-T control register. */ #define MDIO_AN_10GBT_CTRL_ADV2_5G 0x0080 /* Advertise 2.5GBASE-T */ #define MDIO_AN_10GBT_CTRL_ADV5G 0x0100 /* Advertise 5GBASE-T */ #define MDIO_AN_10GBT_CTRL_ADV10G 0x1000 /* Advertise 10GBASE-T */ /* AN 10GBASE-T status register. */ #define MDIO_AN_10GBT_STAT_LP2_5G 0x0020 /* LP is 2.5GBT capable */ #define MDIO_AN_10GBT_STAT_LP5G 0x0040 /* LP is 5GBT capable */ #define MDIO_AN_10GBT_STAT_LPTRR 0x0200 /* LP training reset req. */ #define MDIO_AN_10GBT_STAT_LPLTABLE 0x0400 /* LP loop timing ability */ #define MDIO_AN_10GBT_STAT_LP10G 0x0800 /* LP is 10GBT capable */ #define MDIO_AN_10GBT_STAT_REMOK 0x1000 /* Remote OK */ #define MDIO_AN_10GBT_STAT_LOCOK 0x2000 /* Local OK */ #define MDIO_AN_10GBT_STAT_MS 0x4000 /* Master/slave config */ #define MDIO_AN_10GBT_STAT_MSFLT 0x8000 /* Master/slave config fault */ /* EEE Supported/Advertisement/LP Advertisement registers. * * EEE capability Register (3.20), Advertisement (7.60) and * Link partner ability (7.61) registers have and can use the same identical * bit masks. */ #define MDIO_AN_EEE_ADV_100TX 0x0002 /* Advertise 100TX EEE cap */ #define MDIO_AN_EEE_ADV_1000T 0x0004 /* Advertise 1000T EEE cap */ /* Note: the two defines above can be potentially used by the user-land * and cannot remove them now. * So, we define the new generic MDIO_EEE_100TX and MDIO_EEE_1000T macros * using the previous ones (that can be considered obsolete). */ #define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX /* 100TX EEE cap */ #define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T /* 1000T EEE cap */ #define MDIO_EEE_10GT 0x0008 /* 10GT EEE cap */ #define MDIO_EEE_1000KX 0x0010 /* 1000KX EEE cap */ #define MDIO_EEE_10GKX4 0x0020 /* 10G KX4 EEE cap */ #define MDIO_EEE_10GKR 0x0040 /* 10G KR EEE cap */ #define MDIO_EEE_40GR_FW 0x0100 /* 40G R fast wake */ #define MDIO_EEE_40GR_DS 0x0200 /* 40G R deep sleep */ #define MDIO_EEE_100GR_FW 0x1000 /* 100G R fast wake */ #define MDIO_EEE_100GR_DS 0x2000 /* 100G R deep sleep */ #define MDIO_EEE_2_5GT 0x0001 /* 2.5GT EEE cap */ #define MDIO_EEE_5GT 0x0002 /* 5GT EEE cap */ /* 2.5G/5G Extended abilities register. */ #define MDIO_PMA_NG_EXTABLE_2_5GBT 0x0001 /* 2.5GBASET ability */ #define MDIO_PMA_NG_EXTABLE_5GBT 0x0002 /* 5GBASET ability */ /* LASI RX_ALARM control/status registers. */ #define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001 /* PHY XS RX local fault */ #define MDIO_PMA_LASI_RX_PCSLFLT 0x0008 /* PCS RX local fault */ #define MDIO_PMA_LASI_RX_PMALFLT 0x0010 /* PMA/PMD RX local fault */ #define MDIO_PMA_LASI_RX_OPTICPOWERFLT 0x0020 /* RX optical power fault */ #define MDIO_PMA_LASI_RX_WISLFLT 0x0200 /* WIS local fault */ /* LASI TX_ALARM control/status registers. */ #define MDIO_PMA_LASI_TX_PHYXSLFLT 0x0001 /* PHY XS TX local fault */ #define MDIO_PMA_LASI_TX_PCSLFLT 0x0008 /* PCS TX local fault */ #define MDIO_PMA_LASI_TX_PMALFLT 0x0010 /* PMA/PMD TX local fault */ #define MDIO_PMA_LASI_TX_LASERPOWERFLT 0x0080 /* Laser output power fault */ #define MDIO_PMA_LASI_TX_LASERTEMPFLT 0x0100 /* Laser temperature fault */ #define MDIO_PMA_LASI_TX_LASERBICURRFLT 0x0200 /* Laser bias current fault */ /* LASI control/status registers. */ #define MDIO_PMA_LASI_LSALARM 0x0001 /* LS_ALARM enable/status */ #define MDIO_PMA_LASI_TXALARM 0x0002 /* TX_ALARM enable/status */ #define MDIO_PMA_LASI_RXALARM 0x0004 /* RX_ALARM enable/status */ /* Mapping between MDIO PRTAD/DEVAD and mii_ioctl_data::phy_id */ #define MDIO_PHY_ID_C45 0x8000 #define MDIO_PHY_ID_PRTAD 0x03e0 #define MDIO_PHY_ID_DEVAD 0x001f #define MDIO_PHY_ID_C45_MASK \ (MDIO_PHY_ID_C45 | MDIO_PHY_ID_PRTAD | MDIO_PHY_ID_DEVAD) static __inline__ __u16 mdio_phy_id_c45(int prtad, int devad) { return MDIO_PHY_ID_C45 | (prtad << 5) | devad; } /* UsxgmiiChannelInfo[15:0] for USXGMII in-band auto-negotiation.*/ #define MDIO_USXGMII_EEE_CLK_STP 0x0080 /* EEE clock stop supported */ #define MDIO_USXGMII_EEE 0x0100 /* EEE supported */ #define MDIO_USXGMII_SPD_MASK 0x0e00 /* USXGMII speed mask */ #define MDIO_USXGMII_FULL_DUPLEX 0x1000 /* USXGMII full duplex */ #define MDIO_USXGMII_DPX_SPD_MASK 0x1e00 /* USXGMII duplex and speed bits */ #define MDIO_USXGMII_10 0x0000 /* 10Mbps */ #define MDIO_USXGMII_10HALF 0x0000 /* 10Mbps half-duplex */ #define MDIO_USXGMII_10FULL 0x1000 /* 10Mbps full-duplex */ #define MDIO_USXGMII_100 0x0200 /* 100Mbps */ #define MDIO_USXGMII_100HALF 0x0200 /* 100Mbps half-duplex */ #define MDIO_USXGMII_100FULL 0x1200 /* 100Mbps full-duplex */ #define MDIO_USXGMII_1000 0x0400 /* 1000Mbps */ #define MDIO_USXGMII_1000HALF 0x0400 /* 1000Mbps half-duplex */ #define MDIO_USXGMII_1000FULL 0x1400 /* 1000Mbps full-duplex */ #define MDIO_USXGMII_10G 0x0600 /* 10Gbps */ #define MDIO_USXGMII_10GHALF 0x0600 /* 10Gbps half-duplex */ #define MDIO_USXGMII_10GFULL 0x1600 /* 10Gbps full-duplex */ #define MDIO_USXGMII_2500 0x0800 /* 2500Mbps */ #define MDIO_USXGMII_2500HALF 0x0800 /* 2500Mbps half-duplex */ #define MDIO_USXGMII_2500FULL 0x1800 /* 2500Mbps full-duplex */ #define MDIO_USXGMII_5000 0x0a00 /* 5000Mbps */ #define MDIO_USXGMII_5000HALF 0x0a00 /* 5000Mbps half-duplex */ #define MDIO_USXGMII_5000FULL 0x1a00 /* 5000Mbps full-duplex */ #define MDIO_USXGMII_LINK 0x8000 /* PHY link with copper-side partner */ #endif /* __LINUX_MDIO_H__ */
Save
cmd:
run