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4.18.0-553.121.1.el8_10.x86_64
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mips
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cavium-octeon
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/usr/src/kernels/4.18.0-553.121.1.el8_10.x86_64/arch/mips/cavium-octeon
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/usr/src/kernels/4.18.0-553.121.1.el8_10.x86_64/arch/mips/cavium-octeon/Kconfig
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# SPDX-License-Identifier: GPL-2.0 if CPU_CAVIUM_OCTEON config CAVIUM_CN63XXP1 bool "Enable CN63XXP1 errata workarounds" default "n" help The CN63XXP1 chip requires build time workarounds to function reliably, select this option to enable them. These workarounds will cause a slight decrease in performance on non-CN63XXP1 hardware, so it is recommended to select "n" unless it is known the workarounds are needed. config CAVIUM_OCTEON_CVMSEG_SIZE int "Number of L1 cache lines reserved for CVMSEG memory" range 0 54 default 1 help CVMSEG LM is a segment that accesses portions of the dcache as a local memory; the larger CVMSEG is, the smaller the cache is. This selects the size of CVMSEG LM, which is in cache blocks. The legally range is from zero to 54 cache blocks (i.e. CVMSEG LM is between zero and 6192 bytes). endif # CPU_CAVIUM_OCTEON if CAVIUM_OCTEON_SOC config CAVIUM_OCTEON_LOCK_L2 bool "Lock often used kernel code in the L2" default "y" help Enable locking parts of the kernel into the L2 cache. config CAVIUM_OCTEON_LOCK_L2_TLB bool "Lock the TLB handler in L2" depends on CAVIUM_OCTEON_LOCK_L2 default "y" help Lock the low level TLB fast path into L2. config CAVIUM_OCTEON_LOCK_L2_EXCEPTION bool "Lock the exception handler in L2" depends on CAVIUM_OCTEON_LOCK_L2 default "y" help Lock the low level exception handler into L2. config CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT bool "Lock the interrupt handler in L2" depends on CAVIUM_OCTEON_LOCK_L2 default "y" help Lock the low level interrupt handler into L2. config CAVIUM_OCTEON_LOCK_L2_INTERRUPT bool "Lock the 2nd level interrupt handler in L2" depends on CAVIUM_OCTEON_LOCK_L2 default "y" help Lock the 2nd level interrupt handler in L2. config CAVIUM_OCTEON_LOCK_L2_MEMCPY bool "Lock memcpy() in L2" depends on CAVIUM_OCTEON_LOCK_L2 default "y" help Lock the kernel's implementation of memcpy() into L2. config OCTEON_ILM tristate "Module to measure interrupt latency using Octeon CIU Timer" help This driver is a module to measure interrupt latency using the the CIU Timers on Octeon. To compile this driver as a module, choose M here. The module will be called octeon-ilm endif # CAVIUM_OCTEON_SOC
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