FM / drm

/usr/src/kernels/4.18.0-553.121.1.el8_10.x86_64/include/drm/

/usr/src/kernels/4.18.0-553.121.1.el8_10.x86_64/include/drm

Name	Size	Mode	Actions
bridge/	-	0755	rm
display/	-	0755	rm
i2c/	-	0755	rm
ttm/	-	0755	rm
amd_asic_type.h	2228	0644	edit dl rm
drm_accel.h	2502	0644	edit dl rm
drm_aperture.h	1160	0644	edit dl rm
drm_atomic.h	42345	0644	edit dl rm
drm_atomic_helper.h	9998	0644	edit dl rm
drm_atomic_state_helper.h	4529	0644	edit dl rm
drm_atomic_uapi.h	2111	0644	edit dl rm
drm_audio_component.h	3935	0644	edit dl rm
drm_auth.h	4754	0644	edit dl rm
drm_blend.h	2407	0644	edit dl rm
drm_bridge.h	34436	0644	edit dl rm
drm_bridge_connector.h	405	0644	edit dl rm
drm_buddy.h	4227	0644	edit dl rm
drm_cache.h	3377	0644	edit dl rm
drm_client.h	5166	0644	edit dl rm
drm_color_mgmt.h	3884	0644	edit dl rm
drm_connector.h	63549	0644	edit dl rm
drm_crtc.h	45886	0644	edit dl rm
drm_crtc_helper.h	2567	0644	edit dl rm
drm_damage_helper.h	3408	0644	edit dl rm
drm_debugfs.h	5058	0644	edit dl rm
drm_debugfs_crc.h	2723	0644	edit dl rm
drm_device.h	9416	0644	edit dl rm
drm_displayid.h	4949	0644	edit dl rm
drm_drv.h	19744	0644	edit dl rm
drm_edid.h	20399	0644	edit dl rm
drm_encoder.h	11087	0644	edit dl rm
drm_encoder_slave.h	6614	0644	edit dl rm
drm_fbdev_generic.h	349	0644	edit dl rm
drm_fb_dma_helper.h	575	0644	edit dl rm
drm_fb_helper.h	14380	0644	edit dl rm
drm_file.h	12827	0644	edit dl rm
drm_fixed.h	4993	0644	edit dl rm
drm_flip_work.h	3080	0644	edit dl rm
drm_format_helper.h	3319	0644	edit dl rm
drm_fourcc.h	10096	0644	edit dl rm
drm_framebuffer.h	10856	0644	edit dl rm
drm_gem.h	13646	0644	edit dl rm
drm_gem_atomic_helper.h	5360	0644	edit dl rm
drm_gem_dma_helper.h	9766	0644	edit dl rm
drm_gem_framebuffer_helper.h	1973	0644	edit dl rm
drm_gem_shmem_helper.h	8597	0644	edit dl rm
drm_gem_ttm_helper.h	822	0644	edit dl rm
drm_gem_vram_helper.h	6286	0644	edit dl rm
drm_ioctl.h	6320	0644	edit dl rm
drm_kunit_helpers.h	3072	0644	edit dl rm
drm_lease.h	1010	0644	edit dl rm
drm_legacy.h	9617	0644	edit dl rm
drm_managed.h	3992	0644	edit dl rm
drm_mipi_dbi.h	6953	0644	edit dl rm
drm_mipi_dsi.h	13449	0644	edit dl rm
drm_mm.h	17950	0644	edit dl rm
drm_modes.h	20381	0644	edit dl rm
drm_modeset_helper.h	1814	0644	edit dl rm
drm_modeset_helper_vtables.h	59622	0644	edit dl rm
drm_modeset_lock.h	7244	0644	edit dl rm
drm_mode_config.h	33729	0644	edit dl rm
drm_mode_object.h	5587	0644	edit dl rm
drm_module.h	3808	0644	edit dl rm
drm_of.h	5016	0644	edit dl rm
drm_panel.h	7100	0644	edit dl rm
drm_pciids.h	62502	0644	edit dl rm
drm_plane.h	30811	0644	edit dl rm
drm_plane_helper.h	2391	0644	edit dl rm
drm_prime.h	4162	0644	edit dl rm
drm_print.h	19215	0644	edit dl rm
drm_privacy_screen_consumer.h	1983	0644	edit dl rm
drm_privacy_screen_driver.h	3058	0644	edit dl rm
drm_privacy_screen_machine.h	1281	0644	edit dl rm
drm_probe_helper.h	1607	0644	edit dl rm
drm_property.h	12042	0644	edit dl rm
drm_rect.h	7338	0644	edit dl rm
drm_self_refresh_helper.h	594	0644	edit dl rm
drm_simple_kms_helper.h	9744	0644	edit dl rm
drm_syncobj.h	3943	0644	edit dl rm
drm_sysfs.h	515	0644	edit dl rm
drm_util.h	2642	0644	edit dl rm
drm_utils.h	504	0644	edit dl rm
drm_vblank.h	9255	0644	edit dl rm
drm_vblank_work.h	1956	0644	edit dl rm
drm_vma_manager.h	8428	0644	edit dl rm
drm_writeback.h	4552	0644	edit dl rm
gma_drm.h	413	0644	edit dl rm
gpu_scheduler.h	19364	0644	edit dl rm
gud.h	11934	0644	edit dl rm
i915_component.h	1825	0644	edit dl rm
i915_drm.h	3655	0644	edit dl rm
i915_mei_hdcp_interface.h	5907	0644	edit dl rm
i915_pciids.h	24003	0644	edit dl rm
i915_pxp_tee_interface.h	1250	0644	edit dl rm
intel-gtt.h	1015	0644	edit dl rm
intel_lpe_audio.h	1758	0644	edit dl rm
spsc_queue.h	3131	0644	edit dl rm
task_barrier.h	3020	0644	edit dl rm

Edit: /usr/src/kernels/4.18.0-553.121.1.el8_10.x86_64/include/drm/drm_cache.h (3377B)

/**************************************************************************
 *
 * Copyright 2009 Red Hat Inc.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 *
 **************************************************************************/
/*
 * Authors:
 * Dave Airlie <airlied@redhat.com>
 */

#ifndef _DRM_CACHE_H_
#define _DRM_CACHE_H_

#include <linux/scatterlist.h>

struct iosys_map;

void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
void drm_clflush_sg(struct sg_table *st);
void drm_clflush_virt_range(void *addr, unsigned long length);
bool drm_need_swiotlb(int dma_bits);

static inline bool drm_arch_can_wc_memory(void)
{
#if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
	return false;
#elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON64)
	return false;
#elif defined(CONFIG_ARM) || defined(CONFIG_ARM64)
	/*
	 * The DRM driver stack is designed to work with cache coherent devices
	 * only, but permits an optimization to be enabled in some cases, where
	 * for some buffers, both the CPU and the GPU use uncached mappings,
	 * removing the need for DMA snooping and allocation in the CPU caches.
	 *
	 * The use of uncached GPU mappings relies on the correct implementation
	 * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
	 * will use cached mappings nonetheless. On x86 platforms, this does not
	 * seem to matter, as uncached CPU mappings will snoop the caches in any
	 * case. However, on ARM and arm64, enabling this optimization on a
	 * platform where NoSnoop is ignored results in loss of coherency, which
	 * breaks correct operation of the device. Since we have no way of
	 * detecting whether NoSnoop works or not, just disable this
	 * optimization entirely for ARM and arm64.
	 */
	return false;
#elif defined(CONFIG_LOONGARCH)
	/*
	 * LoongArch maintains cache coherency in hardware, but its WUC attribute
	 * (Weak-ordered UnCached, which is similar to WC) is out of the scope of
	 * cache coherency machanism. This means WUC can only used for write-only
	 * memory regions.
	 */
	return false;
#else
	return true;
#endif
}

void drm_memcpy_init_early(void);

void drm_memcpy_from_wc(struct iosys_map *dst,
			const struct iosys_map *src,
			unsigned long len);
#endif

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