FM / mfd

/usr/src/kernels/4.18.0-553.121.1.el8_10.x86_64/include/linux/mfd/

/usr/src/kernels/4.18.0-553.121.1.el8_10.x86_64/include/linux/mfd

Name	Size	Mode	Actions
abx500/	-	0755	rm
arizona/	-	0755	rm
da9052/	-	0755	rm
da9055/	-	0755	rm
da9062/	-	0755	rm
da9063/	-	0755	rm
da9150/	-	0755	rm
mt6323/	-	0755	rm
mt6397/	-	0755	rm
pcf50633/	-	0755	rm
samsung/	-	0755	rm
syscon/	-	0755	rm
wm831x/	-	0755	rm
wm8350/	-	0755	rm
wm8994/	-	0755	rm
88pm80x.h	10226	0644	edit dl rm
88pm860x.h	13654	0644	edit dl rm
aat2870.h	4651	0644	edit dl rm
ab3100.h	4262	0644	edit dl rm
abx500.h	11980	0644	edit dl rm
ac100.h	6267	0644	edit dl rm
adp5520.h	8499	0644	edit dl rm
altera-a10sr.h	3507	0644	edit dl rm
as3711.h	2960	0644	edit dl rm
as3722.h	15477	0644	edit dl rm
asic3.h	12514	0644	edit dl rm
atmel-hlcdc.h	2634	0644	edit dl rm
axp20x.h	17214	0644	edit dl rm
bcm590xx.h	831	0644	edit dl rm
bd9571mwv.h	3712	0644	edit dl rm
core.h	4794	0644	edit dl rm
cros_ec.h	10595	0644	edit dl rm
cros_ec_commands.h	87508	0644	edit dl rm
cros_ec_lpc_mec.h	2838	0644	edit dl rm
cros_ec_lpc_reg.h	1949	0644	edit dl rm
da8xx-cfgchip.h	7501	0644	edit dl rm
da903x.h	7218	0644	edit dl rm
davinci_voicecodec.h	3323	0644	edit dl rm
db8500-prcmu.h	22205	0644	edit dl rm
dbx500-prcmu.h	14681	0644	edit dl rm
dln2.h	3617	0644	edit dl rm
dm355evm_msp.h	2879	0644	edit dl rm
ds1wm.h	817	0644	edit dl rm
ezx-pcap.h	7932	0644	edit dl rm
hi655x-pmic.h	2076	0644	edit dl rm
hi6421-pmic.h	1329	0644	edit dl rm
htc-pasic3.h	1225	0644	edit dl rm
imx25-tsadc.h	4972	0644	edit dl rm
intel_msic.h	16376	0644	edit dl rm
intel_soc_pmic.h	1265	0644	edit dl rm
intel_soc_pmic_bxtwc.h	2053	0644	edit dl rm
ipaq-micro.h	3750	0644	edit dl rm
janz.h	1053	0644	edit dl rm
kempld.h	4260	0644	edit dl rm
lm3533.h	2650	0644	edit dl rm
lochnagar.h	1624	0644	edit dl rm
lochnagar1_regs.h	7896	0644	edit dl rm
lochnagar2_regs.h	15550	0644	edit dl rm
lp873x.h	8895	0644	edit dl rm
lp3943.h	2747	0644	edit dl rm
lp8788-isink.h	1218	0644	edit dl rm
lp8788.h	8573	0644	edit dl rm
lp87565.h	7862	0644	edit dl rm
lpc_ich.h	1261	0644	edit dl rm
max8907.h	7701	0644	edit dl rm
max8925.h	7350	0644	edit dl rm
max8997-private.h	12733	0644	edit dl rm
max8997.h	6202	0644	edit dl rm
max8998-private.h	5126	0644	edit dl rm
max8998.h	3641	0644	edit dl rm
max14577-private.h	16240	0644	edit dl rm
max14577.h	2745	0644	edit dl rm
max77620.h	11134	0644	edit dl rm
max77686-private.h	13526	0644	edit dl rm
max77686.h	2709	0644	edit dl rm
max77693-common.h	1303	0644	edit dl rm
max77693-private.h	18384	0644	edit dl rm
max77693.h	2295	0644	edit dl rm
max77843-private.h	15804	0644	edit dl rm
mc13xxx.h	7872	0644	edit dl rm
mc13783.h	2902	0644	edit dl rm
mc13892.h	938	0644	edit dl rm
mcp.h	1816	0644	edit dl rm
menelaus.h	1284	0644	edit dl rm
motorola-cpcap.h	12797	0644	edit dl rm
mxs-lradc.h	6191	0644	edit dl rm
palmas.h	152645	0644	edit dl rm
qcom_rpm.h	293	0644	edit dl rm
rave-sp.h	1414	0644	edit dl rm
rc5t583.h	10056	0644	edit dl rm
rdc321x.h	591	0644	edit dl rm
retu.h	723	0644	edit dl rm
rk808.h	12807	0644	edit dl rm
rn5t618.h	7519	0644	edit dl rm
rt5033-private.h	8026	0644	edit dl rm
rt5033.h	1243	0644	edit dl rm
si476x-core.h	15606	0644	edit dl rm
si476x-platform.h	6603	0644	edit dl rm
si476x-reports.h	5010	0644	edit dl rm
sky81452.h	990	0644	edit dl rm
smsc.h	2921	0644	edit dl rm
sta2x11-mfd.h	19169	0644	edit dl rm
stm32-lptimer.h	1817	0644	edit dl rm
stm32-timers.h	5784	0644	edit dl rm
stmpe.h	3466	0644	edit dl rm
stw481x.h	1442	0644	edit dl rm
sun4i-gpadc.h	3710	0644	edit dl rm
syscon.h	1443	0644	edit dl rm
t7l66xb.h	817	0644	edit dl rm
tc3589x.h	3999	0644	edit dl rm
tc6387xb.h	516	0644	edit dl rm
tc6393xb.h	1548	0644	edit dl rm
ti-lmu-register.h	7613	0644	edit dl rm
ti-lmu.h	1822	0644	edit dl rm
ti_am335x_tscadc.h	5861	0644	edit dl rm
tmio.h	4098	0644	edit dl rm
tps6105x.h	3099	0644	edit dl rm
tps6507x.h	5055	0644	edit dl rm
tps6586x.h	2802	0644	edit dl rm
tps65010.h	6685	0644	edit dl rm
tps65086.h	3580	0644	edit dl rm
tps65090.h	4491	0644	edit dl rm
tps65217.h	8435	0644	edit dl rm
tps65218.h	8033	0644	edit dl rm
tps65910.h	31325	0644	edit dl rm
tps65912.h	10144	0644	edit dl rm
tps68470.h	3002	0644	edit dl rm
tps80031.h	20059	0644	edit dl rm
twl.h	26189	0644	edit dl rm
twl4030-audio.h	8741	0644	edit dl rm
twl6040.h	7328	0644	edit dl rm
ucb1x00.h	6728	0644	edit dl rm
viperboard.h	3022	0644	edit dl rm
wl1273-core.h	8496	0644	edit dl rm
wm97xx.h	576	0644	edit dl rm
wm8400-audio.h	71471	0644	edit dl rm
wm8400-private.h	59376	0644	edit dl rm
wm8400.h	1213	0644	edit dl rm

Edit: /usr/src/kernels/4.18.0-553.121.1.el8_10.x86_64/include/linux/mfd/tps65217.h (8435B)

/*
 * linux/mfd/tps65217.h
 *
 * Functions to access TPS65217 power management chip.
 *
 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef __LINUX_MFD_TPS65217_H
#define __LINUX_MFD_TPS65217_H

#include <linux/i2c.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>

/* TPS chip id list */
#define TPS65217			0xF0

/* I2C ID for TPS65217 part */
#define TPS65217_I2C_ID			0x24

/* All register addresses */
#define TPS65217_REG_CHIPID		0X00
#define TPS65217_REG_PPATH		0X01
#define TPS65217_REG_INT		0X02
#define TPS65217_REG_CHGCONFIG0		0X03
#define TPS65217_REG_CHGCONFIG1		0X04
#define TPS65217_REG_CHGCONFIG2		0X05
#define TPS65217_REG_CHGCONFIG3		0X06
#define TPS65217_REG_WLEDCTRL1		0X07
#define TPS65217_REG_WLEDCTRL2		0X08
#define TPS65217_REG_MUXCTRL		0X09
#define TPS65217_REG_STATUS		0X0A
#define TPS65217_REG_PASSWORD		0X0B
#define TPS65217_REG_PGOOD		0X0C
#define TPS65217_REG_DEFPG		0X0D
#define TPS65217_REG_DEFDCDC1		0X0E
#define TPS65217_REG_DEFDCDC2		0X0F
#define TPS65217_REG_DEFDCDC3		0X10
#define TPS65217_REG_DEFSLEW		0X11
#define TPS65217_REG_DEFLDO1		0X12
#define TPS65217_REG_DEFLDO2		0X13
#define TPS65217_REG_DEFLS1		0X14
#define TPS65217_REG_DEFLS2		0X15
#define TPS65217_REG_ENABLE		0X16
#define TPS65217_REG_DEFUVLO		0X18
#define TPS65217_REG_SEQ1		0X19
#define TPS65217_REG_SEQ2		0X1A
#define TPS65217_REG_SEQ3		0X1B
#define TPS65217_REG_SEQ4		0X1C
#define TPS65217_REG_SEQ5		0X1D
#define TPS65217_REG_SEQ6		0X1E

#define TPS65217_REG_MAX		TPS65217_REG_SEQ6

/* Register field definitions */
#define TPS65217_CHIPID_CHIP_MASK	0xF0
#define TPS65217_CHIPID_REV_MASK	0x0F

#define TPS65217_PPATH_ACSINK_ENABLE	BIT(7)
#define TPS65217_PPATH_USBSINK_ENABLE	BIT(6)
#define TPS65217_PPATH_AC_PW_ENABLE	BIT(5)
#define TPS65217_PPATH_USB_PW_ENABLE	BIT(4)
#define TPS65217_PPATH_AC_CURRENT_MASK	0x0C
#define TPS65217_PPATH_USB_CURRENT_MASK	0x03

#define TPS65217_INT_PBM		BIT(6)
#define TPS65217_INT_ACM		BIT(5)
#define TPS65217_INT_USBM		BIT(4)
#define TPS65217_INT_PBI		BIT(2)
#define TPS65217_INT_ACI		BIT(1)
#define TPS65217_INT_USBI		BIT(0)
#define TPS65217_INT_SHIFT		4
#define TPS65217_INT_MASK		(TPS65217_INT_PBM | TPS65217_INT_ACM | \
					TPS65217_INT_USBM)

#define TPS65217_CHGCONFIG0_TREG	BIT(7)
#define TPS65217_CHGCONFIG0_DPPM	BIT(6)
#define TPS65217_CHGCONFIG0_TSUSP	BIT(5)
#define TPS65217_CHGCONFIG0_TERMI	BIT(4)
#define TPS65217_CHGCONFIG0_ACTIVE	BIT(3)
#define TPS65217_CHGCONFIG0_CHGTOUT	BIT(2)
#define TPS65217_CHGCONFIG0_PCHGTOUT	BIT(1)
#define TPS65217_CHGCONFIG0_BATTEMP	BIT(0)

#define TPS65217_CHGCONFIG1_TMR_MASK	0xC0
#define TPS65217_CHGCONFIG1_TMR_ENABLE	BIT(5)
#define TPS65217_CHGCONFIG1_NTC_TYPE	BIT(4)
#define TPS65217_CHGCONFIG1_RESET	BIT(3)
#define TPS65217_CHGCONFIG1_TERM	BIT(2)
#define TPS65217_CHGCONFIG1_SUSP	BIT(1)
#define TPS65217_CHGCONFIG1_CHG_EN	BIT(0)

#define TPS65217_CHGCONFIG2_DYNTMR	BIT(7)
#define TPS65217_CHGCONFIG2_VPREGHG	BIT(6)
#define TPS65217_CHGCONFIG2_VOREG_MASK	0x30

#define TPS65217_CHGCONFIG3_ICHRG_MASK	0xC0
#define TPS65217_CHGCONFIG3_DPPMTH_MASK	0x30
#define TPS65217_CHGCONFIG2_PCHRGT	BIT(3)
#define TPS65217_CHGCONFIG2_TERMIF	0x06
#define TPS65217_CHGCONFIG2_TRANGE	BIT(0)

#define TPS65217_WLEDCTRL1_ISINK_ENABLE	BIT(3)
#define TPS65217_WLEDCTRL1_ISEL		BIT(2)
#define TPS65217_WLEDCTRL1_FDIM_MASK	0x03

#define TPS65217_WLEDCTRL2_DUTY_MASK	0x7F

#define TPS65217_MUXCTRL_MUX_MASK	0x07

#define TPS65217_STATUS_OFF		BIT(7)
#define TPS65217_STATUS_ACPWR		BIT(3)
#define TPS65217_STATUS_USBPWR		BIT(2)
#define TPS65217_STATUS_PB		BIT(0)

#define TPS65217_PASSWORD_REGS_UNLOCK	0x7D

#define TPS65217_PGOOD_LDO3_PG		BIT(6)
#define TPS65217_PGOOD_LDO4_PG		BIT(5)
#define TPS65217_PGOOD_DC1_PG		BIT(4)
#define TPS65217_PGOOD_DC2_PG		BIT(3)
#define TPS65217_PGOOD_DC3_PG		BIT(2)
#define TPS65217_PGOOD_LDO1_PG		BIT(1)
#define TPS65217_PGOOD_LDO2_PG		BIT(0)

#define TPS65217_DEFPG_LDO1PGM		BIT(3)
#define TPS65217_DEFPG_LDO2PGM		BIT(2)
#define TPS65217_DEFPG_PGDLY_MASK	0x03

#define TPS65217_DEFDCDCX_XADJX		BIT(7)
#define TPS65217_DEFDCDCX_DCDC_MASK	0x3F

#define TPS65217_DEFSLEW_GO		BIT(7)
#define TPS65217_DEFSLEW_GODSBL		BIT(6)
#define TPS65217_DEFSLEW_PFM_EN1	BIT(5)
#define TPS65217_DEFSLEW_PFM_EN2	BIT(4)
#define TPS65217_DEFSLEW_PFM_EN3	BIT(3)
#define TPS65217_DEFSLEW_SLEW_MASK	0x07

#define TPS65217_DEFLDO1_LDO1_MASK	0x0F

#define TPS65217_DEFLDO2_TRACK		BIT(6)
#define TPS65217_DEFLDO2_LDO2_MASK	0x3F

#define TPS65217_DEFLDO3_LDO3_EN	BIT(5)
#define TPS65217_DEFLDO3_LDO3_MASK	0x1F

#define TPS65217_DEFLDO4_LDO4_EN	BIT(5)
#define TPS65217_DEFLDO4_LDO4_MASK	0x1F

#define TPS65217_ENABLE_LS1_EN		BIT(6)
#define TPS65217_ENABLE_LS2_EN		BIT(5)
#define TPS65217_ENABLE_DC1_EN		BIT(4)
#define TPS65217_ENABLE_DC2_EN		BIT(3)
#define TPS65217_ENABLE_DC3_EN		BIT(2)
#define TPS65217_ENABLE_LDO1_EN		BIT(1)
#define TPS65217_ENABLE_LDO2_EN		BIT(0)

#define TPS65217_DEFUVLO_UVLOHYS	BIT(2)
#define TPS65217_DEFUVLO_UVLO_MASK	0x03

#define TPS65217_SEQ1_DC1_SEQ_MASK	0xF0
#define TPS65217_SEQ1_DC2_SEQ_MASK	0x0F

#define TPS65217_SEQ2_DC3_SEQ_MASK	0xF0
#define TPS65217_SEQ2_LDO1_SEQ_MASK	0x0F

#define TPS65217_SEQ3_LDO2_SEQ_MASK	0xF0
#define TPS65217_SEQ3_LDO3_SEQ_MASK	0x0F

#define TPS65217_SEQ4_LDO4_SEQ_MASK	0xF0

#define TPS65217_SEQ5_DLY1_MASK		0xC0
#define TPS65217_SEQ5_DLY2_MASK		0x30
#define TPS65217_SEQ5_DLY3_MASK		0x0C
#define TPS65217_SEQ5_DLY4_MASK		0x03

#define TPS65217_SEQ6_DLY5_MASK		0xC0
#define TPS65217_SEQ6_DLY6_MASK		0x30
#define TPS65217_SEQ6_SEQUP		BIT(2)
#define TPS65217_SEQ6_SEQDWN		BIT(1)
#define TPS65217_SEQ6_INSTDWN		BIT(0)

#define TPS65217_MAX_REGISTER		0x1E
#define TPS65217_PROTECT_NONE		0
#define TPS65217_PROTECT_L1		1
#define TPS65217_PROTECT_L2		2

enum tps65217_regulator_id {
	/* DCDC's */
	TPS65217_DCDC_1,
	TPS65217_DCDC_2,
	TPS65217_DCDC_3,
	/* LDOs */
	TPS65217_LDO_1,
	TPS65217_LDO_2,
	TPS65217_LDO_3,
	TPS65217_LDO_4,
};

#define TPS65217_MAX_REG_ID		TPS65217_LDO_4

/* Number of step-down converters available */
#define TPS65217_NUM_DCDC		3
/* Number of LDO voltage regulators available */
#define TPS65217_NUM_LDO		4
/* Number of total regulators available */
#define TPS65217_NUM_REGULATOR		(TPS65217_NUM_DCDC + TPS65217_NUM_LDO)

enum tps65217_bl_isel {
	TPS65217_BL_ISET1 = 1,
	TPS65217_BL_ISET2,
};

enum tps65217_bl_fdim {
	TPS65217_BL_FDIM_100HZ,
	TPS65217_BL_FDIM_200HZ,
	TPS65217_BL_FDIM_500HZ,
	TPS65217_BL_FDIM_1000HZ,
};

struct tps65217_bl_pdata {
	enum tps65217_bl_isel isel;
	enum tps65217_bl_fdim fdim;
	int dft_brightness;
};

/* Interrupt numbers */
#define TPS65217_IRQ_USB		0
#define TPS65217_IRQ_AC			1
#define TPS65217_IRQ_PB			2
#define TPS65217_NUM_IRQ		3

/**
 * struct tps65217_board - packages regulator init data
 * @tps65217_regulator_data: regulator initialization values
 *
 * Board data may be used to initialize regulator.
 */
struct tps65217_board {
	struct regulator_init_data *tps65217_init_data[TPS65217_NUM_REGULATOR];
	struct device_node *of_node[TPS65217_NUM_REGULATOR];
	struct tps65217_bl_pdata *bl_pdata;
};

/**
 * struct tps65217 - tps65217 sub-driver chip access routines
 *
 * Device data may be used to access the TPS65217 chip
 */

struct tps65217 {
	struct device *dev;
	struct tps65217_board *pdata;
	struct regulator_desc desc[TPS65217_NUM_REGULATOR];
	struct regmap *regmap;
	u8 *strobes;
	struct irq_domain *irq_domain;
	struct mutex irq_lock;
	u8 irq_mask;
	int irq;
};

static inline struct tps65217 *dev_to_tps65217(struct device *dev)
{
	return dev_get_drvdata(dev);
}

int tps65217_reg_read(struct tps65217 *tps, unsigned int reg,
					unsigned int *val);
int tps65217_reg_write(struct tps65217 *tps, unsigned int reg,
			unsigned int val, unsigned int level);
int tps65217_set_bits(struct tps65217 *tps, unsigned int reg,
		unsigned int mask, unsigned int val, unsigned int level);
int tps65217_clear_bits(struct tps65217 *tps, unsigned int reg,
		unsigned int mask, unsigned int level);

#endif /*  __LINUX_MFD_TPS65217_H */

cmd: