FM / asm

/usr/src/kernels/4.18.0-553.157.1.el8_10.x86_64/arch/x86/include/asm/

/usr/src/kernels/4.18.0-553.157.1.el8_10.x86_64/arch/x86/include/asm

Name	Size	Mode	Actions
crypto/	-	0755	rm
e820/	-	0755	rm
fpu/	-	0755	rm
numachip/	-	0755	rm
shared/	-	0755	rm
trace/	-	0755	rm
uv/	-	0755	rm
vdso/	-	0755	rm
xen/	-	0755	rm
a.out-core.h	1931	0644	edit dl rm
acenv.h	1596	0644	edit dl rm
acpi.h	5300	0644	edit dl rm
agp.h	1070	0644	edit dl rm
alternative.h	11407	0644	edit dl rm
amd-ibs.h	5020	0644	edit dl rm
amd_hsmp.h	364	0644	edit dl rm
amd_nb.h	3086	0644	edit dl rm
apb_timer.h	1466	0644	edit dl rm
apic.h	14661	0644	edit dl rm
apicdef.h	11565	0644	edit dl rm
apic_flat_64.h	151	0644	edit dl rm
apm.h	1768	0644	edit dl rm
archrandom.h	3221	0644	edit dl rm
arch_hweight.h	1311	0644	edit dl rm
asm-offsets.h	35	0644	edit dl rm
asm-prototypes.h	946	0644	edit dl rm
asm.h	5186	0644	edit dl rm
atomic.h	6279	0644	edit dl rm
atomic64_32.h	8150	0644	edit dl rm
atomic64_64.h	5933	0644	edit dl rm
audit.h	170	0644	edit dl rm
barrier.h	2471	0644	edit dl rm
bios_ebda.h	914	0644	edit dl rm
bitops.h	10727	0644	edit dl rm
boot.h	1825	0644	edit dl rm
bootparam_utils.h	2907	0644	edit dl rm
bug.h	2117	0644	edit dl rm
bugs.h	533	0644	edit dl rm
cache.h	641	0644	edit dl rm
cacheflush.h	306	0644	edit dl rm
cacheinfo.h	209	0644	edit dl rm
calgary.h	2370	0644	edit dl rm
ce4100.h	121	0644	edit dl rm
checksum.h	133	0644	edit dl rm
checksum_32.h	4964	0644	edit dl rm
checksum_64.h	5541	0644	edit dl rm
clocksource.h	480	0644	edit dl rm
cmdline.h	302	0644	edit dl rm
cmpxchg.h	7891	0644	edit dl rm
cmpxchg_32.h	3247	0644	edit dl rm
cmpxchg_64.h	552	0644	edit dl rm
coco.h	482	0644	edit dl rm
compat.h	4861	0644	edit dl rm
cpu.h	2607	0644	edit dl rm
cpufeature.h	9470	0644	edit dl rm
cpufeatures.h	32845	0644	edit dl rm
cpuid.h	498	0644	edit dl rm
cpuidle_haltpoll.h	189	0644	edit dl rm
cpumask.h	408	0644	edit dl rm
cpu_device_id.h	8109	0644	edit dl rm
cpu_entry_area.h	4162	0644	edit dl rm
crash.h	300	0644	edit dl rm
current.h	443	0644	edit dl rm
debugreg.h	3411	0644	edit dl rm
delay.h	275	0644	edit dl rm
desc.h	12274	0644	edit dl rm
desc_defs.h	3396	0644	edit dl rm
device.h	328	0644	edit dl rm
disabled-features.h	3559	0644	edit dl rm
div64.h	2189	0644	edit dl rm
dma-mapping.h	288	0644	edit dl rm
dma.h	9827	0644	edit dl rm
dmi.h	556	0644	edit dl rm
dwarf2.h	2487	0644	edit dl rm
edac.h	474	0644	edit dl rm
efi.h	7416	0644	edit dl rm
elf.h	12640	0644	edit dl rm
emergency-restart.h	202	0644	edit dl rm
emulate_prefix.h	484	0644	edit dl rm
enclu.h	181	0644	edit dl rm
entry_arch.h	1922	0644	edit dl rm
espfix.h	426	0644	edit dl rm
exec.h	37	0644	edit dl rm
export.h	120	0644	edit dl rm
extable.h	1300	0644	edit dl rm
fb.h	540	0644	edit dl rm
fixmap.h	6381	0644	edit dl rm
floppy.h	6748	0644	edit dl rm
frame.h	2237	0644	edit dl rm
fsgsbase.h	2072	0644	edit dl rm
ftrace.h	2777	0644	edit dl rm
futex.h	2269	0644	edit dl rm
gart.h	2682	0644	edit dl rm
genapic.h	22	0644	edit dl rm
geode.h	842	0644	edit dl rm
hardirq.h	2207	0644	edit dl rm
highmem.h	2466	0644	edit dl rm
hpet.h	3461	0644	edit dl rm
hugetlb.h	1867	0644	edit dl rm
hw_breakpoint.h	2112	0644	edit dl rm
hw_irq.h	4126	0644	edit dl rm
hyperv-tlfs.h	22337	0644	edit dl rm
hypervisor.h	1975	0644	edit dl rm
i8259.h	1975	0644	edit dl rm
ia32.h	1789	0644	edit dl rm
ia32_unistd.h	313	0644	edit dl rm
imr.h	1849	0644	edit dl rm
inat.h	6736	0644	edit dl rm
inat_types.h	1013	0644	edit dl rm
init.h	632	0644	edit dl rm
insn-eval.h	1546	0644	edit dl rm
insn.h	8098	0644	edit dl rm
inst.h	5453	0644	edit dl rm
intel-family.h	5168	0644	edit dl rm
intel-mid.h	5025	0644	edit dl rm
intel_ds.h	849	0644	edit dl rm
intel_mid_vrtc.h	330	0644	edit dl rm
intel_pconfig.h	1545	0644	edit dl rm
intel_pmc_ipc.h	2267	0644	edit dl rm
intel_pt.h	1276	0644	edit dl rm
intel_punit_ipc.h	4666	0644	edit dl rm
intel_scu_ipc.h	2351	0644	edit dl rm
intel_telemetry.h	4060	0644	edit dl rm
invpcid.h	1604	0644	edit dl rm
io.h	11872	0644	edit dl rm
iomap.h	1228	0644	edit dl rm
iommu.h	935	0644	edit dl rm
iosf_mbi.h	7354	0644	edit dl rm
io_apic.h	5890	0644	edit dl rm
ipi.h	2873	0644	edit dl rm
irq.h	1415	0644	edit dl rm
irqdomain.h	1796	0644	edit dl rm
irqflags.h	4161	0644	edit dl rm
irq_regs.h	683	0644	edit dl rm
irq_remapping.h	2865	0644	edit dl rm
irq_vectors.h	4105	0644	edit dl rm
irq_work.h	465	0644	edit dl rm
ist.h	735	0644	edit dl rm
jailhouse_para.h	449	0644	edit dl rm
jump_label.h	2529	0644	edit dl rm
kasan.h	1291	0644	edit dl rm
kaslr.h	314	0644	edit dl rm
kbdleds.h	454	0644	edit dl rm
Kbuild	319	0644	edit dl rm
kdebug.h	1042	0644	edit dl rm
kexec-bzimage64.h	195	0644	edit dl rm
kexec.h	5843	0644	edit dl rm
kgdb.h	2143	0644	edit dl rm
kprobes.h	3701	0644	edit dl rm
kvm-x86-ops.h	3989	0644	edit dl rm
kvmclock.h	506	0644	edit dl rm
kvm_host.h	63925	0644	edit dl rm
kvm_page_track.h	2700	0644	edit dl rm
kvm_para.h	4422	0644	edit dl rm
kvm_types.h	178	0644	edit dl rm
kvm_vcpu_regs.h	606	0644	edit dl rm
linkage.h	1268	0644	edit dl rm
livepatch.h	1039	0644	edit dl rm
local.h	3925	0644	edit dl rm
local64.h	33	0644	edit dl rm
mach_timer.h	1590	0644	edit dl rm
mach_traps.h	1013	0644	edit dl rm
math_emu.h	395	0644	edit dl rm
mc146818rtc.h	2835	0644	edit dl rm
mce.h	11909	0644	edit dl rm
mcsafe_test.h	1418	0644	edit dl rm
memtype.h	815	0644	edit dl rm
mem_encrypt.h	3543	0644	edit dl rm
microcode.h	3557	0644	edit dl rm
microcode_amd.h	1373	0644	edit dl rm
microcode_intel.h	2619	0644	edit dl rm
misc.h	143	0644	edit dl rm
mmconfig.h	374	0644	edit dl rm
mmu.h	1689	0644	edit dl rm
mmu_context.h	10118	0644	edit dl rm
mmx.h	337	0644	edit dl rm
mmzone.h	129	0644	edit dl rm
mmzone_32.h	1188	0644	edit dl rm
mmzone_64.h	430	0644	edit dl rm
module.h	2096	0644	edit dl rm
mpspec.h	4023	0644	edit dl rm
mpspec_def.h	4256	0644	edit dl rm
mpx.h	3125	0644	edit dl rm
mshyperv.h	10142	0644	edit dl rm
msi.h	1508	0644	edit dl rm
msidef.h	1814	0644	edit dl rm
msr-index.h	42495	0644	edit dl rm
msr-trace.h	1387	0644	edit dl rm
msr.h	11290	0644	edit dl rm
mtrr.h	4753	0644	edit dl rm
mwait.h	4968	0644	edit dl rm
nmi.h	1496	0644	edit dl rm
nops.h	4412	0644	edit dl rm
nospec-branch.h	14205	0644	edit dl rm
numa.h	2228	0644	edit dl rm
numa_32.h	256	0644	edit dl rm
olpc.h	3240	0644	edit dl rm
olpc_ofw.h	1128	0644	edit dl rm
orc_lookup.h	1665	0644	edit dl rm
orc_types.h	3577	0644	edit dl rm
page.h	2517	0644	edit dl rm
page_32.h	1039	0644	edit dl rm
page_32_types.h	1691	0644	edit dl rm
page_64.h	1573	0644	edit dl rm
page_64_types.h	2208	0644	edit dl rm
page_types.h	2369	0644	edit dl rm
paravirt.h	24608	0644	edit dl rm
paravirt_types.h	22709	0644	edit dl rm
parport.h	314	0644	edit dl rm
pci-direct.h	740	0644	edit dl rm
pci-functions.h	654	0644	edit dl rm
pci.h	3288	0644	edit dl rm
pci_64.h	684	0644	edit dl rm
pci_x86.h	6283	0644	edit dl rm
percpu.h	20267	0644	edit dl rm
perf_event.h	17896	0644	edit dl rm
perf_event_p4.h	26731	0644	edit dl rm
pgalloc.h	6591	0644	edit dl rm
pgtable-2level.h	2815	0644	edit dl rm
pgtable-2level_types.h	867	0644	edit dl rm
pgtable-3level.h	8832	0644	edit dl rm
pgtable-3level_types.h	1007	0644	edit dl rm
pgtable-invert.h	1091	0644	edit dl rm
pgtable.h	35801	0644	edit dl rm
pgtable_32.h	3159	0644	edit dl rm
pgtable_32_types.h	2121	0644	edit dl rm
pgtable_64.h	7474	0644	edit dl rm
pgtable_64_types.h	4365	0644	edit dl rm
pgtable_types.h	17149	0644	edit dl rm
pkeys.h	3542	0644	edit dl rm
pkru.h	1346	0644	edit dl rm
platform_sst_audio.h	3290	0644	edit dl rm
pm-trace.h	611	0644	edit dl rm
posix_types.h	144	0644	edit dl rm
preempt.h	3217	0644	edit dl rm
probe_roms.h	273	0644	edit dl rm
processor-cyrix.h	879	0644	edit dl rm
processor-flags.h	1750	0644	edit dl rm
processor.h	24480	0644	edit dl rm
prom.h	1028	0644	edit dl rm
proto.h	1313	0644	edit dl rm
pti.h	429	0644	edit dl rm
ptrace.h	8996	0644	edit dl rm
purgatory.h	235	0644	edit dl rm
pvclock-abi.h	1530	0644	edit dl rm
pvclock.h	2702	0644	edit dl rm
qrwlock.h	199	0644	edit dl rm
qspinlock.h	2598	0644	edit dl rm
qspinlock_paravirt.h	1908	0644	edit dl rm
realmode.h	2064	0644	edit dl rm
reboot.h	898	0644	edit dl rm
reboot_fixups.h	183	0644	edit dl rm
refcount.h	2911	0644	edit dl rm
required-features.h	3043	0644	edit dl rm
resctrl.h	3064	0644	edit dl rm
rio.h	2630	0644	edit dl rm
rmwcc.h	2259	0644	edit dl rm
seccomp.h	510	0644	edit dl rm
sections.h	916	0644	edit dl rm
segment.h	11184	0644	edit dl rm
serial.h	1137	0644	edit dl rm
setup.h	3751	0644	edit dl rm
setup_arch.h	77	0644	edit dl rm
set_memory.h	5381	0644	edit dl rm
sev-common.h	4867	0644	edit dl rm
sev.h	6965	0644	edit dl rm
sgx.h	13157	0644	edit dl rm
shmparam.h	193	0644	edit dl rm
sigcontext.h	261	0644	edit dl rm
sigframe.h	2339	0644	edit dl rm
sighandling.h	730	0644	edit dl rm
signal.h	2424	0644	edit dl rm
simd.h	287	0644	edit dl rm
smap.h	2247	0644	edit dl rm
smp.h	5500	0644	edit dl rm
sparsemem.h	994	0644	edit dl rm
spec-ctrl.h	3143	0644	edit dl rm
special_insns.h	7536	0644	edit dl rm
spinlock.h	1214	0644	edit dl rm
spinlock_types.h	719	0644	edit dl rm
sta2x11.h	352	0644	edit dl rm
stackprotector.h	3966	0644	edit dl rm
stacktrace.h	2619	0644	edit dl rm
string.h	129	0644	edit dl rm
string_32.h	7929	0644	edit dl rm
string_64.h	4237	0644	edit dl rm
suspend.h	503	0644	edit dl rm
suspend_32.h	938	0644	edit dl rm
suspend_64.h	1838	0644	edit dl rm
svm.h	14672	0644	edit dl rm
switch_to.h	3258	0644	edit dl rm
sync_bitops.h	3503	0644	edit dl rm
sync_core.h	3138	0644	edit dl rm
syscall.h	5489	0644	edit dl rm
syscalls.h	1332	0644	edit dl rm
syscall_wrapper.h	7780	0644	edit dl rm
sysfb.h	2600	0644	edit dl rm
tce.h	1724	0644	edit dl rm
tdx.h	2360	0644	edit dl rm
text-patching.h	4812	0644	edit dl rm
thermal.h	428	0644	edit dl rm
thread_info.h	8805	0644	edit dl rm
time.h	331	0644	edit dl rm
timer.h	1027	0644	edit dl rm
timex.h	305	0644	edit dl rm
tlb.h	1103	0644	edit dl rm
tlbbatch.h	332	0644	edit dl rm
tlbflush.h	17813	0644	edit dl rm
topology.h	6654	0644	edit dl rm
trace_clock.h	406	0644	edit dl rm
trapnr.h	1316	0644	edit dl rm
traps.h	5374	0644	edit dl rm
trap_pf.h	709	0644	edit dl rm
tsc.h	1950	0644	edit dl rm
uaccess.h	21233	0644	edit dl rm
uaccess_32.h	1006	0644	edit dl rm
uaccess_64.h	3129	0644	edit dl rm
umip.h	329	0644	edit dl rm
unaligned.h	345	0644	edit dl rm
unistd.h	1482	0644	edit dl rm
unwind.h	3220	0644	edit dl rm
unwind_hints.h	3342	0644	edit dl rm
uprobes.h	1686	0644	edit dl rm
user.h	2257	0644	edit dl rm
user32.h	2156	0644	edit dl rm
user_32.h	5042	0644	edit dl rm
user_64.h	5339	0644	edit dl rm
vdso.h	1400	0644	edit dl rm
vga.h	740	0644	edit dl rm
vgtod.h	518	0644	edit dl rm
virtext.h	3102	0644	edit dl rm
vm86.h	2212	0644	edit dl rm
vmware.h	1942	0644	edit dl rm
vmx.h	26763	0644	edit dl rm
vmxfeatures.h	6049	0644	edit dl rm
vsyscall.h	920	0644	edit dl rm
vvar.h	1603	0644	edit dl rm
word-at-a-time.h	2596	0644	edit dl rm
x86_init.h	11520	0644	edit dl rm
xor.h	10508	0644	edit dl rm
xor_32.h	14748	0644	edit dl rm
xor_64.h	716	0644	edit dl rm
xor_avx.h	4610	0644	edit dl rm

Edit: /usr/src/kernels/4.18.0-553.157.1.el8_10.x86_64/arch/x86/include/asm/dma.h (9827B)

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
 * Written by Hennus Bergman, 1992.
 * High DMA channel support & info by Hannu Savolainen
 * and John Boyd, Nov. 1992.
 */

#ifndef _ASM_X86_DMA_H
#define _ASM_X86_DMA_H

#include <linux/spinlock.h>	/* And spinlocks */
#include <asm/io.h>		/* need byte IO */

#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
#define dma_outb	outb_p
#else
#define dma_outb	outb
#endif

#define dma_inb		inb

/*
 * NOTES about DMA transfers:
 *
 *  controller 1: channels 0-3, byte operations, ports 00-1F
 *  controller 2: channels 4-7, word operations, ports C0-DF
 *
 *  - ALL registers are 8 bits only, regardless of transfer size
 *  - channel 4 is not used - cascades 1 into 2.
 *  - channels 0-3 are byte - addresses/counts are for physical bytes
 *  - channels 5-7 are word - addresses/counts are for physical words
 *  - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
 *  - transfer count loaded to registers is 1 less than actual count
 *  - controller 2 offsets are all even (2x offsets for controller 1)
 *  - page registers for 5-7 don't use data bit 0, represent 128K pages
 *  - page registers for 0-3 use bit 0, represent 64K pages
 *
 * DMA transfers are limited to the lower 16MB of _physical_ memory.
 * Note that addresses loaded into registers must be _physical_ addresses,
 * not logical addresses (which may differ if paging is active).
 *
 *  Address mapping for channels 0-3:
 *
 *   A23 ... A16 A15 ... A8  A7 ... A0    (Physical addresses)
 *    |  ...  |   |  ... |   |  ... |
 *    |  ...  |   |  ... |   |  ... |
 *    |  ...  |   |  ... |   |  ... |
 *   P7  ...  P0  A7 ... A0  A7 ... A0
 * |    Page    | Addr MSB | Addr LSB |   (DMA registers)
 *
 *  Address mapping for channels 5-7:
 *
 *   A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0    (Physical addresses)
 *    |  ...  |   \   \   ... \  \  \  ... \  \
 *    |  ...  |    \   \   ... \  \  \  ... \  (not used)
 *    |  ...  |     \   \   ... \  \  \  ... \
 *   P7  ...  P1 (0) A7 A6  ... A0 A7 A6 ... A0
 * |      Page      |  Addr MSB   |  Addr LSB  |   (DMA registers)
 *
 * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
 * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
 * the hardware level, so odd-byte transfers aren't possible).
 *
 * Transfer count (_not # bytes_) is limited to 64K, represented as actual
 * count - 1 : 64K => 0xFFFF, 1 => 0x0000.  Thus, count is always 1 or more,
 * and up to 128K bytes may be transferred on channels 5-7 in one operation.
 *
 */

#define MAX_DMA_CHANNELS	8

/* 16MB ISA DMA zone */
#define MAX_DMA_PFN   ((16UL * 1024 * 1024) >> PAGE_SHIFT)

/* 4GB broken PCI/AGP hardware bus master zone */
#define MAX_DMA32_PFN ((4UL * 1024 * 1024 * 1024) >> PAGE_SHIFT)

#ifdef CONFIG_X86_32
/* The maximum address that we can perform a DMA transfer to on this platform */
#define MAX_DMA_ADDRESS      (PAGE_OFFSET + 0x1000000)
#else
/* Compat define for old dma zone */
#define MAX_DMA_ADDRESS ((unsigned long)__va(MAX_DMA_PFN << PAGE_SHIFT))
#endif

/* 8237 DMA controllers */
#define IO_DMA1_BASE	0x00	/* 8 bit slave DMA, channels 0..3 */
#define IO_DMA2_BASE	0xC0	/* 16 bit master DMA, ch 4(=slave input)..7 */

/* DMA controller registers */
#define DMA1_CMD_REG		0x08	/* command register (w) */
#define DMA1_STAT_REG		0x08	/* status register (r) */
#define DMA1_REQ_REG		0x09    /* request register (w) */
#define DMA1_MASK_REG		0x0A	/* single-channel mask (w) */
#define DMA1_MODE_REG		0x0B	/* mode register (w) */
#define DMA1_CLEAR_FF_REG	0x0C	/* clear pointer flip-flop (w) */
#define DMA1_TEMP_REG		0x0D    /* Temporary Register (r) */
#define DMA1_RESET_REG		0x0D	/* Master Clear (w) */
#define DMA1_CLR_MASK_REG       0x0E    /* Clear Mask */
#define DMA1_MASK_ALL_REG       0x0F    /* all-channels mask (w) */

#define DMA2_CMD_REG		0xD0	/* command register (w) */
#define DMA2_STAT_REG		0xD0	/* status register (r) */
#define DMA2_REQ_REG		0xD2    /* request register (w) */
#define DMA2_MASK_REG		0xD4	/* single-channel mask (w) */
#define DMA2_MODE_REG		0xD6	/* mode register (w) */
#define DMA2_CLEAR_FF_REG	0xD8	/* clear pointer flip-flop (w) */
#define DMA2_TEMP_REG		0xDA    /* Temporary Register (r) */
#define DMA2_RESET_REG		0xDA	/* Master Clear (w) */
#define DMA2_CLR_MASK_REG       0xDC    /* Clear Mask */
#define DMA2_MASK_ALL_REG       0xDE    /* all-channels mask (w) */

#define DMA_ADDR_0		0x00    /* DMA address registers */
#define DMA_ADDR_1		0x02
#define DMA_ADDR_2		0x04
#define DMA_ADDR_3		0x06
#define DMA_ADDR_4		0xC0
#define DMA_ADDR_5		0xC4
#define DMA_ADDR_6		0xC8
#define DMA_ADDR_7		0xCC

#define DMA_CNT_0		0x01    /* DMA count registers */
#define DMA_CNT_1		0x03
#define DMA_CNT_2		0x05
#define DMA_CNT_3		0x07
#define DMA_CNT_4		0xC2
#define DMA_CNT_5		0xC6
#define DMA_CNT_6		0xCA
#define DMA_CNT_7		0xCE

#define DMA_PAGE_0		0x87    /* DMA page registers */
#define DMA_PAGE_1		0x83
#define DMA_PAGE_2		0x81
#define DMA_PAGE_3		0x82
#define DMA_PAGE_5		0x8B
#define DMA_PAGE_6		0x89
#define DMA_PAGE_7		0x8A

/* I/O to memory, no autoinit, increment, single mode */
#define DMA_MODE_READ		0x44
/* memory to I/O, no autoinit, increment, single mode */
#define DMA_MODE_WRITE		0x48
/* pass thru DREQ->HRQ, DACK<-HLDA only */
#define DMA_MODE_CASCADE	0xC0

#define DMA_AUTOINIT		0x10

#ifdef CONFIG_ISA_DMA_API
extern spinlock_t  dma_spin_lock;

static inline unsigned long claim_dma_lock(void)
{
	unsigned long flags;
	spin_lock_irqsave(&dma_spin_lock, flags);
	return flags;
}

static inline void release_dma_lock(unsigned long flags)
{
	spin_unlock_irqrestore(&dma_spin_lock, flags);
}
#endif /* CONFIG_ISA_DMA_API */

/* enable/disable a specific DMA channel */
static inline void enable_dma(unsigned int dmanr)
{
	if (dmanr <= 3)
		dma_outb(dmanr, DMA1_MASK_REG);
	else
		dma_outb(dmanr & 3, DMA2_MASK_REG);
}

static inline void disable_dma(unsigned int dmanr)
{
	if (dmanr <= 3)
		dma_outb(dmanr | 4, DMA1_MASK_REG);
	else
		dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
}

/* Clear the 'DMA Pointer Flip Flop'.
 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
 * Use this once to initialize the FF to a known state.
 * After that, keep track of it. :-)
 * --- In order to do that, the DMA routines below should ---
 * --- only be used while holding the DMA lock ! ---
 */
static inline void clear_dma_ff(unsigned int dmanr)
{
	if (dmanr <= 3)
		dma_outb(0, DMA1_CLEAR_FF_REG);
	else
		dma_outb(0, DMA2_CLEAR_FF_REG);
}

/* set mode (above) for a specific DMA channel */
static inline void set_dma_mode(unsigned int dmanr, char mode)
{
	if (dmanr <= 3)
		dma_outb(mode | dmanr, DMA1_MODE_REG);
	else
		dma_outb(mode | (dmanr & 3), DMA2_MODE_REG);
}

/* Set only the page register bits of the transfer address.
 * This is used for successive transfers when we know the contents of
 * the lower 16 bits of the DMA current address register, but a 64k boundary
 * may have been crossed.
 */
static inline void set_dma_page(unsigned int dmanr, char pagenr)
{
	switch (dmanr) {
	case 0:
		dma_outb(pagenr, DMA_PAGE_0);
		break;
	case 1:
		dma_outb(pagenr, DMA_PAGE_1);
		break;
	case 2:
		dma_outb(pagenr, DMA_PAGE_2);
		break;
	case 3:
		dma_outb(pagenr, DMA_PAGE_3);
		break;
	case 5:
		dma_outb(pagenr & 0xfe, DMA_PAGE_5);
		break;
	case 6:
		dma_outb(pagenr & 0xfe, DMA_PAGE_6);
		break;
	case 7:
		dma_outb(pagenr & 0xfe, DMA_PAGE_7);
		break;
	}
}

/* Set transfer address & page bits for specific DMA channel.
 * Assumes dma flipflop is clear.
 */
static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
{
	set_dma_page(dmanr, a>>16);
	if (dmanr <= 3)  {
		dma_outb(a & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
		dma_outb((a >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
	}  else  {
		dma_outb((a >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
		dma_outb((a >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
	}
}

/* Set transfer size (max 64k for DMA0..3, 128k for DMA5..7) for
 * a specific DMA channel.
 * You must ensure the parameters are valid.
 * NOTE: from a manual: "the number of transfers is one more
 * than the initial word count"! This is taken into account.
 * Assumes dma flip-flop is clear.
 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
 */
static inline void set_dma_count(unsigned int dmanr, unsigned int count)
{
	count--;
	if (dmanr <= 3)  {
		dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
		dma_outb((count >> 8) & 0xff,
			 ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
	} else {
		dma_outb((count >> 1) & 0xff,
			 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
		dma_outb((count >> 9) & 0xff,
			 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
	}
}

/* Get DMA residue count. After a DMA transfer, this
 * should return zero. Reading this while a DMA transfer is
 * still in progress will return unpredictable results.
 * If called before the channel has been used, it may return 1.
 * Otherwise, it returns the number of _bytes_ left to transfer.
 *
 * Assumes DMA flip-flop is clear.
 */
static inline int get_dma_residue(unsigned int dmanr)
{
	unsigned int io_port;
	/* using short to get 16-bit wrap around */
	unsigned short count;

io_port = (dmanr <= 3) ? ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
		: ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE;

count = 1 + dma_inb(io_port);
	count += dma_inb(io_port) << 8;

return (dmanr <= 3) ? count : (count << 1);
}

/* These are in kernel/dma.c because x86 uses CONFIG_GENERIC_ISA_DMA */
#ifdef CONFIG_ISA_DMA_API
extern int request_dma(unsigned int dmanr, const char *device_id);
extern void free_dma(unsigned int dmanr);
#endif

/* From PCI */

#ifdef CONFIG_PCI
extern int isa_dma_bridge_buggy;
#else
#define isa_dma_bridge_buggy	(0)
#endif

#endif /* _ASM_X86_DMA_H */

cmd: